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From: Tvrtko Ursulin <tursulin@ursulin.net>
To: Intel-gfx@lists.freedesktop.org
Subject: [PATCH i-g-t 1/2] intel-gpu-overlay: Add queued stat
Date: Wed, 22 Nov 2017 12:47:04 +0000	[thread overview]
Message-ID: <20171122124705.32730-1-tvrtko.ursulin@linux.intel.com> (raw)

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 lib/igt_perf.h    |  6 ++++++
 overlay/gpu-top.c | 14 ++++++++++++++
 overlay/gpu-top.h |  6 ++++++
 overlay/overlay.c |  3 +++
 4 files changed, 29 insertions(+)

diff --git a/lib/igt_perf.h b/lib/igt_perf.h
index 5428feb0c746..eaf7a928d296 100644
--- a/lib/igt_perf.h
+++ b/lib/igt_perf.h
@@ -35,9 +35,12 @@ enum drm_i915_pmu_engine_sample {
 	I915_SAMPLE_BUSY = 0,
 	I915_SAMPLE_WAIT = 1,
 	I915_SAMPLE_SEMA = 2,
+	I915_SAMPLE_QUEUED = 3,
 	I915_ENGINE_SAMPLE_MAX /* non-ABI */
 };
 
+#define I915_SAMPLE_QUEUED_SCALE 1e-2 /* No braces please. */
+
 #define I915_PMU_SAMPLE_BITS (4)
 #define I915_PMU_SAMPLE_MASK (0xf)
 #define I915_PMU_SAMPLE_INSTANCE_BITS (8)
@@ -58,6 +61,9 @@ enum drm_i915_pmu_engine_sample {
 #define I915_PMU_ENGINE_SEMA(class, instance) \
 	__I915_PMU_ENGINE(class, instance, I915_SAMPLE_SEMA)
 
+#define I915_PMU_ENGINE_QUEUED(class, instance) \
+	__I915_PMU_ENGINE(class, instance, I915_SAMPLE_QUEUED)
+
 #define __I915_PMU_OTHER(x) (__I915_PMU_ENGINE(0xff, 0xff, 0xf) + 1 + (x))
 
 #define I915_PMU_ACTUAL_FREQUENCY	__I915_PMU_OTHER(0)
diff --git a/overlay/gpu-top.c b/overlay/gpu-top.c
index 61b8f62fd78c..c252a0a984f1 100644
--- a/overlay/gpu-top.c
+++ b/overlay/gpu-top.c
@@ -72,6 +72,10 @@ static int perf_init(struct gpu_top *gt)
 				 gt->fd) >= 0)
 		gt->have_sema = 1;
 
+	if (perf_i915_open_group(I915_PMU_ENGINE_QUEUED(d->class, d->inst),
+				 gt->fd) >= 0)
+		gt->have_queued = 1;
+
 	gt->ring[0].name = d->name;
 	gt->num_rings = 1;
 
@@ -93,6 +97,12 @@ static int perf_init(struct gpu_top *gt)
 				   gt->fd) < 0)
 			return -1;
 
+		if (gt->have_queued &&
+		    perf_i915_open_group(I915_PMU_ENGINE_QUEUED(d->class,
+								d->inst),
+				   gt->fd) < 0)
+			return -1;
+
 		gt->ring[gt->num_rings++].name = d->name;
 	}
 
@@ -298,6 +308,8 @@ int gpu_top_update(struct gpu_top *gt)
 				s->wait[n] = sample[m++];
 			if (gt->have_sema)
 				s->sema[n] = sample[m++];
+			if (gt->have_queued)
+				s->queued[n] = sample[m++];
 		}
 
 		if (gt->count == 1)
@@ -310,6 +322,8 @@ int gpu_top_update(struct gpu_top *gt)
 				gt->ring[n].u.u.wait = (100 * (s->wait[n] - d->wait[n]) + d_time/2) / d_time;
 			if (gt->have_sema)
 				gt->ring[n].u.u.sema = (100 * (s->sema[n] - d->sema[n]) + d_time/2) / d_time;
+			if (gt->have_queued)
+				gt->queued[n] = (double)((s->queued[n] - d->queued[n])) * 1e9 * I915_SAMPLE_QUEUED_SCALE / d_time;
 
 			/* in case of rounding + sampling errors, fudge */
 			if (gt->ring[n].u.u.busy > 100)
diff --git a/overlay/gpu-top.h b/overlay/gpu-top.h
index d3cdd779760f..7d3acb4aa256 100644
--- a/overlay/gpu-top.h
+++ b/overlay/gpu-top.h
@@ -36,6 +36,7 @@ struct gpu_top {
 	int num_rings;
 	int have_wait;
 	int have_sema;
+	int have_queued;
 
 	struct gpu_top_ring {
 		const char *name;
@@ -44,6 +45,7 @@ struct gpu_top {
 				uint8_t busy;
 				uint8_t wait;
 				uint8_t sema;
+				uint8_t queued;
 			} u;
 			uint32_t payload;
 		} u;
@@ -54,7 +56,11 @@ struct gpu_top {
 		uint64_t busy[MAX_RINGS];
 		uint64_t wait[MAX_RINGS];
 		uint64_t sema[MAX_RINGS];
+		uint64_t queued[MAX_RINGS];
 	} stat[2];
+
+	double queued[MAX_RINGS];
+
 	int count;
 };
 
diff --git a/overlay/overlay.c b/overlay/overlay.c
index 4804f813554a..15c0f09ba0fe 100644
--- a/overlay/overlay.c
+++ b/overlay/overlay.c
@@ -255,6 +255,9 @@ static void show_gpu_top(struct overlay_context *ctx, struct overlay_gpu_top *gt
 		len = sprintf(txt, "%s: %3d%% busy",
 			      gt->gpu_top.ring[n].name,
 			      gt->gpu_top.ring[n].u.u.busy);
+		if (gt->gpu_top.have_queued)
+			len += sprintf(txt + len, ", qd %.2f",
+				       gt->gpu_top.queued[n]);
 		if (gt->gpu_top.ring[n].u.u.wait)
 			len += sprintf(txt + len, ", %d%% wait",
 				       gt->gpu_top.ring[n].u.u.wait);
-- 
2.14.1

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             reply	other threads:[~2017-11-22 12:47 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-11-22 12:47 Tvrtko Ursulin [this message]
2017-11-22 12:47 ` [PATCH i-g-t 2/2] tests/perf_pmu: Add tests for engine queued stat Tvrtko Ursulin
2017-11-22 12:56   ` Chris Wilson
2017-11-22 13:42     ` Tvrtko Ursulin
2017-11-22 13:51       ` Chris Wilson
2017-11-22 14:16         ` Chris Wilson
2017-11-23 15:17 ` ✓ Fi.CI.BAT: success for series starting with [1/2] intel-gpu-overlay: Add " Patchwork
2017-11-23 16:44 ` ✗ Fi.CI.IGT: warning " Patchwork

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