From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH] drm: Introduce RGB 64-bit 16:16:16:16 float format Date: Thu, 23 Nov 2017 18:06:38 +0200 Message-ID: <20171123160638.GW10981@intel.com> References: <1511427416-3216-1-git-send-email-tina.zhang@intel.com> <1511427416-3216-2-git-send-email-tina.zhang@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Content-Disposition: inline In-Reply-To: <1511427416-3216-2-git-send-email-tina.zhang@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Tina Zhang Cc: dri-devel@lists.freedesktop.org, Daniel Vetter , intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, zhiyuan.lv@intel.com, Dave Airlie , hang.yuan@intel.com, intel-gvt-dev@lists.freedesktop.org, kraxel@redhat.com List-Id: dri-devel@lists.freedesktop.org T24gVGh1LCBOb3YgMjMsIDIwMTcgYXQgMDQ6NTY6NTZQTSArMDgwMCwgVGluYSBaaGFuZyB3cm90 ZToKPiBUaGUgUkdCIDY0LWJpdCAxNjoxNjoxNjoxNiBmbG9hdCBwaXhlbCBmb3JtYXQgaXMgbmVl ZGVkIGJ5IHNvbWUgQXBwcyBpbgo+IHdpbmRvd3MuIFRoZSBmbG9hdCBmb3JtYXQgaW4gZWFjaCBj b21wb25lbnQgaXMgMTo1OjEwIE1TYi1zaWduOmV4cG9uZW50Ogo+IGZyYWN0aW9uLgo+IAo+IFRo aXMgcGF0Y2ggaXMgdG8gaW50cm9kdWNlIHRoZSBmb3JtYXQgdG8gZHJtLCBzbyB0aGF0IHRoZSB3 aW5kb3dzIGd1ZXN0J3MKPiBmcmFtZWJ1ZmZlciBpbiB0aGlzIGtpbmQgb2YgZm9ybWF0IGNhbiBi ZSByZWNvZ25pemVkIGFuZCB1c2VkIGJ5IGxpbnV4Cj4gaG9zdC4KPiAKPiB2MTQ6Cj4gLSBhZGQg c29tZSBkZXRhaWxzIGFib3V0IHRoZSBmbG9hdCBwaXhlbCBmb3JtYXQuIChEYW5pZWwpCj4gLSBh ZGQgRiBzdWZmaXggdG8gdGhlIGRlZmluZWQgbmFtZS4gKERhbmllbCkKPiAKPiB2MTI6Cj4gLSBz ZW5kIHRvIGRyaS1kZXZlbCBhdCBsaXN0cy5mcmVlZGVza3RvcC5vcmcuIChWaWxsZSkKPiAKPiB2 OToKPiAtIHNlcGFyYXRlZCBmcm9tIGZyYW1lYnVmZmVyIGRlY29kZXIgcGF0Y2guIChaaGVueXUp IChYaWFvZ3VhbmcpCj4gCj4gU2lnbmVkLW9mZi1ieTogVGluYSBaaGFuZyA8dGluYS56aGFuZ0Bp bnRlbC5jb20+Cj4gQ2M6IFZpbGxlIFN5cmrDpGzDpCA8dmlsbGUuc3lyamFsYUBsaW51eC5pbnRl bC5jb20+Cj4gQ2M6IERhdmUgQWlybGllIDxhaXJsaWVkQHJlZGhhdC5jb20+Cj4gQ2M6IERhbmll bCBWZXR0ZXIgPGRhbmllbC52ZXR0ZXJAZmZ3bGwuY2g+Cj4gLS0tCj4gIGluY2x1ZGUvdWFwaS9k cm0vZHJtX2ZvdXJjYy5oIHwgNCArKysrCj4gIDEgZmlsZSBjaGFuZ2VkLCA0IGluc2VydGlvbnMo KykKPiAKPiBkaWZmIC0tZ2l0IGEvaW5jbHVkZS91YXBpL2RybS9kcm1fZm91cmNjLmggYi9pbmNs dWRlL3VhcGkvZHJtL2RybV9mb3VyY2MuaAo+IGluZGV4IDNhZDgzOGQuLjM5MWQyZTYgMTAwNjQ0 Cj4gLS0tIGEvaW5jbHVkZS91YXBpL2RybS9kcm1fZm91cmNjLmgKPiArKysgYi9pbmNsdWRlL3Vh cGkvZHJtL2RybV9mb3VyY2MuaAo+IEBAIC0xMTMsNiArMTEzLDEwIEBAIGV4dGVybiAiQyIgewo+ ICAKPiAgI2RlZmluZSBEUk1fRk9STUFUX0FZVVYJCWZvdXJjY19jb2RlKCdBJywgJ1knLCAnVScs ICdWJykgLyogWzMxOjBdIEE6WTpDYjpDciA4Ojg6ODo4IGxpdHRsZSBlbmRpYW4gKi8KPiAgCj4g Ky8qIDY0IGJwcCBSR0IgMTY6MTY6MTY6MTYgRmxvYXRpbmcgUG9pbnQgKi8KCkFzIGJlZm9yZSB0 aGlzIGlzIHN0aWxsIGV4dHJlbWVseSB2YWd1ZS4gU3RhdGluZyB0aGF0IGVhY2ggY29tcG9uZW50 IGlzCmEgSUVFRS03NTQgaGFsZi1wcmVjaXNpb24gZmxvYXQgKGJpbmFyeTE2KSBzaG91bGQgY292 ZXIgaXQuIFdlbGwsIGFzc3VtaW5nCnRoYXQgaXQgcmVhbGx5IGlzIG9uZS4KCj4gKyNkZWZpbmUg RFJNX0ZPUk1BVF9YUkdCMTYxNjE2RiAgZm91cmNjX2NvZGUoJ1gnLCAnUicsICczJywgJ0YnKSAv KiBbNjM6MF0geDpSOkc6QiAxNjoxNjoxNjoxNiBsaXR0bGUgZW5kaWFuICovCj4gKyNkZWZpbmUg RFJNX0ZPUk1BVF9YQkdSMTYxNjE2RiAgZm91cmNjX2NvZGUoJ1gnLCAnQicsICczJywgJ0YnKSAv KiBbNjM6MF0geDpCOkc6UiAxNjoxNjoxNjoxNiBsaXR0bGUgZW5kaWFuICovCgpNaXNzaW5nIG9u ZSAxNiBmcm9tIHRoYXQgbmFtZSB0byBiZSBjb25zaXN0ZW50IHdpdGggdGhlIG5vbi1mbG9hdCBz dHVmZi4KCkFsc28gbWF5YmUgaXQgc2hvdWxkIGJlICguLi4gJzQnLCAnRicpPyAnMycgd291bGQg c2VlbSB0byBpbXBseSBhIDQ4IGJpdApwaXhlbC4KCkFuZCBvZiBjb3Vyc2UgaXQncyBzdGlsbCBt aXNzaW5nIHRoZSBhY3R1YWwgaW1wbGVtbnRhdGlvbiBmb3IgYW55IGRyaXZlci4KCj4gKwo+ICAv Kgo+ICAgKiAyIHBsYW5lIFJHQiArIEEKPiAgICogaW5kZXggMCA9IFJHQiBwbGFuZSwgc2FtZSBm b3JtYXQgYXMgdGhlIGNvcnJlc3BvbmRpbmcgbm9uIF9BOCBmb3JtYXQgaGFzCj4gLS0gCj4gMi43 LjQKCi0tIApWaWxsZSBTeXJqw6Rsw6QKSW50ZWwgT1RDCl9fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fCkludGVsLWdmeCBtYWlsaW5nIGxpc3QKSW50ZWwtZ2Z4 QGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwczovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWls bWFuL2xpc3RpbmZvL2ludGVsLWdmeAo= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753094AbdKWQGq (ORCPT ); Thu, 23 Nov 2017 11:06:46 -0500 Received: from mga11.intel.com ([192.55.52.93]:12548 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752907AbdKWQGp (ORCPT ); Thu, 23 Nov 2017 11:06:45 -0500 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.44,441,1505804400"; d="scan'208";a="5053616" Date: Thu, 23 Nov 2017 18:06:38 +0200 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: Tina Zhang Cc: alex.williamson@redhat.com, kraxel@redhat.com, chris@chris-wilson.co.uk, joonas.lahtinen@linux.intel.com, zhenyuw@linux.intel.com, zhiyuan.lv@intel.com, zhi.a.wang@intel.com, kevin.tian@intel.com, daniel@ffwll.ch, hang.yuan@intel.com, intel-gfx@lists.freedesktop.org, intel-gvt-dev@lists.freedesktop.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Dave Airlie , Daniel Vetter Subject: Re: [PATCH] drm: Introduce RGB 64-bit 16:16:16:16 float format Message-ID: <20171123160638.GW10981@intel.com> References: <1511427416-3216-1-git-send-email-tina.zhang@intel.com> <1511427416-3216-2-git-send-email-tina.zhang@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1511427416-3216-2-git-send-email-tina.zhang@intel.com> User-Agent: Mutt/1.7.2 (2016-11-26) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Nov 23, 2017 at 04:56:56PM +0800, Tina Zhang wrote: > The RGB 64-bit 16:16:16:16 float pixel format is needed by some Apps in > windows. The float format in each component is 1:5:10 MSb-sign:exponent: > fraction. > > This patch is to introduce the format to drm, so that the windows guest's > framebuffer in this kind of format can be recognized and used by linux > host. > > v14: > - add some details about the float pixel format. (Daniel) > - add F suffix to the defined name. (Daniel) > > v12: > - send to dri-devel at lists.freedesktop.org. (Ville) > > v9: > - separated from framebuffer decoder patch. (Zhenyu) (Xiaoguang) > > Signed-off-by: Tina Zhang > Cc: Ville Syrjälä > Cc: Dave Airlie > Cc: Daniel Vetter > --- > include/uapi/drm/drm_fourcc.h | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h > index 3ad838d..391d2e6 100644 > --- a/include/uapi/drm/drm_fourcc.h > +++ b/include/uapi/drm/drm_fourcc.h > @@ -113,6 +113,10 @@ extern "C" { > > #define DRM_FORMAT_AYUV fourcc_code('A', 'Y', 'U', 'V') /* [31:0] A:Y:Cb:Cr 8:8:8:8 little endian */ > > +/* 64 bpp RGB 16:16:16:16 Floating Point */ As before this is still extremely vague. Stating that each component is a IEEE-754 half-precision float (binary16) should cover it. Well, assuming that it really is one. > +#define DRM_FORMAT_XRGB161616F fourcc_code('X', 'R', '3', 'F') /* [63:0] x:R:G:B 16:16:16:16 little endian */ > +#define DRM_FORMAT_XBGR161616F fourcc_code('X', 'B', '3', 'F') /* [63:0] x:B:G:R 16:16:16:16 little endian */ Missing one 16 from that name to be consistent with the non-float stuff. Also maybe it should be (... '4', 'F')? '3' would seem to imply a 48 bit pixel. And of course it's still missing the actual implemntation for any driver. > + > /* > * 2 plane RGB + A > * index 0 = RGB plane, same format as the corresponding non _A8 format has > -- > 2.7.4 -- Ville Syrjälä Intel OTC