From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH 1/3] drm/i915: Pass the correct msgs to gmbus_is_index_read() Date: Fri, 24 Nov 2017 18:06:40 +0200 Message-ID: <20171124160640.GM10981@intel.com> References: <20171123194157.25367-1-ville.syrjala@linux.intel.com> <151147024152.28677.8625638122230579027@mail.alporthouse.com> <20171124125528.GC10981@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1ABD06E50A for ; Fri, 24 Nov 2017 16:06:44 +0000 (UTC) Content-Disposition: inline In-Reply-To: <20171124125528.GC10981@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Chris Wilson Cc: Daniel Vetter , intel-gfx@lists.freedesktop.org, stable@vger.kernel.org List-Id: intel-gfx@lists.freedesktop.org T24gRnJpLCBOb3YgMjQsIDIwMTcgYXQgMDI6NTU6MjhQTSArMDIwMCwgVmlsbGUgU3lyasOkbMOk IHdyb3RlOgo+IE9uIFRodSwgTm92IDIzLCAyMDE3IGF0IDA4OjUwOjQxUE0gKzAwMDAsIENocmlz IFdpbHNvbiB3cm90ZToKPiA+IFF1b3RpbmcgVmlsbGUgU3lyamFsYSAoMjAxNy0xMS0yMyAxOTo0 MTo1NSkKPiA+ID4gRnJvbTogVmlsbGUgU3lyasOkbMOkIDx2aWxsZS5zeXJqYWxhQGxpbnV4Lmlu dGVsLmNvbT4KPiA+ID4gCj4gPiA+IFdlJ3JlIHN1cHBvc2VkIHRvIGV4YW1pbmUgbXNnc1tpXSBh bmQgbXNnc1tpKzFdIHRvIHNlZSBpZiB0aGV5Cj4gPiA+IGZvcm0gYSBwYWlyIHN1aXRhYmxlIGZv ciBhbiBpbmRleGVkIHRyYW5zZmVyLiBCdXQgaW4gcmVhbGl0eQo+ID4gPiB3ZSdyZSBleGFtaW5p bmcgbXNnc1swXSBhbmQgbXNnc1sxXS4gRml4IHRoaXMuCj4gPiA+IAo+ID4gPiBDYzogc3RhYmxl QHZnZXIua2VybmVsLm9yZwo+ID4gPiBDYzogRGFuaWVsIEt1cnR6IDxkamt1cnR6QGNocm9taXVt Lm9yZz4KPiA+ID4gQ2M6IENocmlzIFdpbHNvbiA8Y2hyaXNAY2hyaXMtd2lsc29uLmNvLnVrPgo+ ID4gPiBDYzogRGFuaWVsIFZldHRlciA8ZGFuaWVsLnZldHRlckBmZndsbC5jaD4KPiA+ID4gQ2M6 IFNlYW4gUGF1bCA8c2VhbnBhdWxAY2hyb21pdW0ub3JnPgo+ID4gPiBGaXhlczogNTZmOWVhYzA1 NDg5ICgiZHJtL2k5MTUvaW50ZWxfaTJjOiB1c2UgSU5ERVggY3ljbGVzIGZvciBpMmMgcmVhZCB0 cmFuc2FjdGlvbnMiKQo+ID4gPiBTaWduZWQtb2ZmLWJ5OiBWaWxsZSBTeXJqw6Rsw6QgPHZpbGxl LnN5cmphbGFAbGludXguaW50ZWwuY29tPgo+ID4gPiAtLS0KPiA+ID4gIGRyaXZlcnMvZ3B1L2Ry bS9pOTE1L2ludGVsX2kyYy5jIHwgMiArLQo+ID4gPiAgMSBmaWxlIGNoYW5nZWQsIDEgaW5zZXJ0 aW9uKCspLCAxIGRlbGV0aW9uKC0pCj4gPiA+IAo+ID4gPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9n cHUvZHJtL2k5MTUvaW50ZWxfaTJjLmMgYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pbnRlbF9pMmMu Ywo+ID4gPiBpbmRleCBlYjU4MjcxMTBkOGYuLjE2NTM3NWNiZWYyZiAxMDA2NDQKPiA+ID4gLS0t IGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvaW50ZWxfaTJjLmMKPiA+ID4gKysrIGIvZHJpdmVycy9n cHUvZHJtL2k5MTUvaW50ZWxfaTJjLmMKPiA+ID4gQEAgLTQ4NCw3ICs0ODQsNyBAQCBkb19nbWJ1 c194ZmVyKHN0cnVjdCBpMmNfYWRhcHRlciAqYWRhcHRlciwgc3RydWN0IGkyY19tc2cgKm1zZ3Ms IGludCBudW0pCj4gPiA+ICAKPiA+ID4gICAgICAgICBmb3IgKDsgaSA8IG51bTsgaSArPSBpbmMp IHsKPiA+ID4gICAgICAgICAgICAgICAgIGluYyA9IDE7Cj4gPiA+IC0gICAgICAgICAgICAgICBp ZiAoZ21idXNfaXNfaW5kZXhfcmVhZChtc2dzLCBpLCBudW0pKSB7Cj4gPiA+ICsgICAgICAgICAg ICAgICBpZiAoZ21idXNfaXNfaW5kZXhfcmVhZCgmbXNnc1tpXSwgaSwgbnVtKSkgewo+ID4gCj4g PiBpIGlzIHBhc3NlZCB0byBnbWJ1c19pc19pbmRleF9yZWFkKCkgYW5kIHVzZWQgYXMgYW4gaW5k ZXggaW50byBtc2dzLiBTbwo+ID4gdGhpcyBzaG91bGQgYmUgYWNjb3VudGVkIGZvciByaWdodD8K PiAKPiBEb2guIFllcCwgdGhpcyBwYXRjaCBpcyBub25zZW5zZS4KClRoZSB0d28gb3RoZXIgcGF0 Y2hlcyBwdXNoZWQgdG8gZGlucS4gVGhhbmtzIGNhdGNoaW5nIG15IG1pc3Rha2Ugd2l0aAp0aGlz IG9uZS4KCi0tIApWaWxsZSBTeXJqw6Rsw6QKSW50ZWwgT1RDCl9fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fCkludGVsLWdmeCBtYWlsaW5nIGxpc3QKSW50ZWwt Z2Z4QGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwczovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9t YWlsbWFuL2xpc3RpbmZvL2ludGVsLWdmeAo= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga05.intel.com ([192.55.52.43]:5123 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751983AbdKXQGo (ORCPT ); Fri, 24 Nov 2017 11:06:44 -0500 Date: Fri, 24 Nov 2017 18:06:40 +0200 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: Chris Wilson Cc: Daniel Vetter , intel-gfx@lists.freedesktop.org, stable@vger.kernel.org Subject: Re: [Intel-gfx] [PATCH 1/3] drm/i915: Pass the correct msgs to gmbus_is_index_read() Message-ID: <20171124160640.GM10981@intel.com> References: <20171123194157.25367-1-ville.syrjala@linux.intel.com> <151147024152.28677.8625638122230579027@mail.alporthouse.com> <20171124125528.GC10981@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20171124125528.GC10981@intel.com> Sender: stable-owner@vger.kernel.org List-ID: On Fri, Nov 24, 2017 at 02:55:28PM +0200, Ville Syrj�l� wrote: > On Thu, Nov 23, 2017 at 08:50:41PM +0000, Chris Wilson wrote: > > Quoting Ville Syrjala (2017-11-23 19:41:55) > > > From: Ville Syrj�l� > > > > > > We're supposed to examine msgs[i] and msgs[i+1] to see if they > > > form a pair suitable for an indexed transfer. But in reality > > > we're examining msgs[0] and msgs[1]. Fix this. > > > > > > Cc: stable@vger.kernel.org > > > Cc: Daniel Kurtz > > > Cc: Chris Wilson > > > Cc: Daniel Vetter > > > Cc: Sean Paul > > > Fixes: 56f9eac05489 ("drm/i915/intel_i2c: use INDEX cycles for i2c read transactions") > > > Signed-off-by: Ville Syrj�l� > > > --- > > > drivers/gpu/drm/i915/intel_i2c.c | 2 +- > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c > > > index eb5827110d8f..165375cbef2f 100644 > > > --- a/drivers/gpu/drm/i915/intel_i2c.c > > > +++ b/drivers/gpu/drm/i915/intel_i2c.c > > > @@ -484,7 +484,7 @@ do_gmbus_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num) > > > > > > for (; i < num; i += inc) { > > > inc = 1; > > > - if (gmbus_is_index_read(msgs, i, num)) { > > > + if (gmbus_is_index_read(&msgs[i], i, num)) { > > > > i is passed to gmbus_is_index_read() and used as an index into msgs. So > > this should be accounted for right? > > Doh. Yep, this patch is nonsense. The two other patches pushed to dinq. Thanks catching my mistake with this one. -- Ville Syrj�l� Intel OTC