Re: [PATCH] KVM: VMX: Cache IA32_DEBUGCTL in memory

[Andi Kleen <ak@linux.intel.com>]

On Wed, Nov 29, 2017 at 11:05:46AM -0800, Jim Mattson wrote:
> An alternative is to give the L1 guest read permission for this MSR in
> the MSR permission bitmaps. It's still going to be ~80 cycles, but
> that's better than the cost of a VM-exit/VM-entry round-trip.

It's a useful optimization, 80 cycles is 80 cycles.

The cache invalidation could likely be really simple, like:
have a global counter
always check the counter before and after and don't use the cache
if they don't match.
change KDB etc. to increase the counter.

-Andi