From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: intel-gfx@lists.freedesktop.org,
Dennis Vshivkov <awesome.walrus+bugzilla@gmail.com>
Subject: Re: [PATCH] drm/i915: Interlaced DP output doesn't work on VLV/CHV
Date: Fri, 1 Dec 2017 17:12:14 +0200 [thread overview]
Message-ID: <20171201151214.GL10981@intel.com> (raw)
In-Reply-To: <20171129230703.cpqvinpa32k5yeew@intel.com>
On Wed, Nov 29, 2017 at 03:07:03PM -0800, Rodrigo Vivi wrote:
> On Wed, Nov 29, 2017 at 06:08:47PM +0000, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Reject interlaced modes on VLV/CHV DP outputs. This simply does
> > not work correctly in the hardware. We do get some output, but
> > it's quite corrupted.
> >
> > The available documentation fails to mention this fact. I
> > contacted some hardware people who eventually managed to locate
> > the relevant HSD for VLV, which was resolved by declaring
> > interlaced DP output as not supported. The HSD was never cloned
> > for CHV even though it inherited most of the hardware and
> > thus has the same problems with interlaced DP output.
> >
> > Cc: Dennis Vshivkov <awesome.walrus+bugzilla@gmail.com>
> > Reported-by: Dennis Vshivkov <awesome.walrus+bugzilla@gmail.com>
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103922
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> I'm afraid we won't be able to track that down...
> I took a quick look on wa_database for vlv/chv to see if
> something seemed related, but nothing ring a bell...
>
> So, let's live without these modes.
>
> Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Thanks. Pushed to dinq.
>
>
> > ---
> > drivers/gpu/drm/i915/intel_dp.c | 7 ++++++-
> > 1 file changed, 6 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> > index 957735c0b4c6..61cde5cd04d3 100644
> > --- a/drivers/gpu/drm/i915/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > @@ -1677,6 +1677,10 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> > conn_state->scaling_mode);
> > }
> >
> > + if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) &&
> > + adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
> > + return false;
> > +
> > if (adjusted_mode->flags & DRM_MODE_FLAG_DBLCLK)
> > return false;
> >
> > @@ -6083,7 +6087,8 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
> > drm_connector_init(dev, connector, &intel_dp_connector_funcs, type);
> > drm_connector_helper_add(connector, &intel_dp_connector_helper_funcs);
> >
> > - connector->interlace_allowed = true;
> > + if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv))
> > + connector->interlace_allowed = true;
> > connector->doublescan_allowed = 0;
> >
> > intel_dp_init_connector_port_info(intel_dig_port);
> > --
> > 2.13.6
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2017-12-01 15:12 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-29 18:08 [PATCH] drm/i915: Interlaced DP output doesn't work on VLV/CHV Ville Syrjala
2017-11-29 23:07 ` Rodrigo Vivi
2017-12-01 15:12 ` Ville Syrjälä [this message]
2017-11-30 9:08 ` ✗ Fi.CI.BAT: failure for " Patchwork
2017-11-30 11:03 ` ✓ Fi.CI.BAT: success " Patchwork
2017-11-30 13:36 ` ✗ Fi.CI.IGT: failure " Patchwork
2017-11-30 15:38 ` ✓ Fi.CI.BAT: success " Patchwork
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