From: David Gibson <david@gibson.dropbear.id.au>
To: Michael Davidsaver <mdavidsaver@gmail.com>
Cc: Alexander Graf <agraf@suse.de>,
qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 11/17] e500: derive baud from CCB clock
Date: Tue, 5 Dec 2017 17:40:03 +1100 [thread overview]
Message-ID: <20171205064003.GI3057@umbus.fritz.box> (raw)
In-Reply-To: <f02979282eb1d31811f0f87c0bb5d774a959746c.1511731946.git.mdavidsaver@gmail.com>
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On Sun, Nov 26, 2017 at 03:59:09PM -0600, Michael Davidsaver wrote:
> The CCB (Complex Core Bus) clock is the reference for the DUARTs
> with an extra divide by 16.
>
> >From the mpc8540, mpc8544, and P2010 ref manuals.
> CCB=333MHz, with divider=0x87a gives ~9600 baud.
> 333e6 Hz/(16*0x87a) = 9591 Hz.
> This is verified with a real mpc8540.
>
> The existing value for the mpc8544ds boards is replaced.
> Previously the uart "clock-frequency" device tree node
> was left as zero, and at some point either u-boot or Linux
> picks a value inconsistent with the frequency
> given to serial_mm_init().
> The FIFO timeout calculated from this was incorrect.
>
> Now use an arbitrary (valid) CCB frequency of 333MHz
> in the device tree and for the UART.
>
> Signed-off-by: Michael Davidsaver <mdavidsaver@gmail.com>
> ---
> hw/ppc/e500.c | 9 ++++++++-
> hw/ppc/e500_ccsr.c | 16 ++++++++++++----
> 2 files changed, 20 insertions(+), 5 deletions(-)
>
> diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
> index 2d87d91582..cfd5ed0152 100644
> --- a/hw/ppc/e500.c
> +++ b/hw/ppc/e500.c
> @@ -49,6 +49,12 @@
>
> #define RAM_SIZES_ALIGN (64UL << 20)
>
> +/* Somewhat arbitrarily choosen Complex Core Bus frequency
> + * for our simulation (real freq of mpc8544ds board unknown)
> + * Used in baud rate calculations.
> + */
> +#define CCB_FREQ (333333333)
> +
> /* TODO: parameterize
> * Some CCSR offsets duplicated in e500_ccsr.c
> */
> @@ -113,7 +119,7 @@ static void dt_serial_create(void *fdt, unsigned long long offset,
> qemu_fdt_setprop_string(fdt, ser, "compatible", "ns16550");
> qemu_fdt_setprop_cells(fdt, ser, "reg", offset, 0x100);
> qemu_fdt_setprop_cell(fdt, ser, "cell-index", idx);
> - qemu_fdt_setprop_cell(fdt, ser, "clock-frequency", 0);
> + qemu_fdt_setprop_cell(fdt, ser, "clock-frequency", CCB_FREQ);
Shouldn't this come off the property value, not the constant?
> qemu_fdt_setprop_cells(fdt, ser, "interrupts", 42, 2);
> qemu_fdt_setprop_phandle(fdt, ser, "interrupt-parent", mpic);
> qemu_fdt_setprop_string(fdt, "/aliases", alias, ser);
> @@ -759,6 +765,7 @@ void ppce500_init(MachineState *machine, PPCE500Params *params)
> dev = qdev_create(NULL, "e500-ccsr");
> object_property_add_child(qdev_get_machine(), "e500-ccsr",
> OBJECT(dev), NULL);
> + qdev_prop_set_uint32(dev, "ccb-freq", CCB_FREQ);
> qdev_prop_set_uint32(dev, "mpic-model", params->mpic_version);
> qdev_prop_set_uint32(dev, "base", params->ccsrbar_base);
> qdev_prop_set_uint32(dev, "ram-size", ram_size);
> diff --git a/hw/ppc/e500_ccsr.c b/hw/ppc/e500_ccsr.c
> index f1adba4e54..c479ed91ee 100644
> --- a/hw/ppc/e500_ccsr.c
> +++ b/hw/ppc/e500_ccsr.c
> @@ -69,6 +69,7 @@ typedef struct {
> uint32_t merrd;
>
> uint32_t porpllsr;
> + uint32_t ccb_freq;
>
> DeviceState *pic;
> } CCSRState;
> @@ -272,15 +273,21 @@ static void e500_ccsr_realize(DeviceState *dev, Error **errp)
> /* Note: MPIC internal interrupts are offset by 16 */
>
> /* DUARTS */
> + /* for mpc8540, mpc8544, and P2010 (unmodeled), the DUART reference clock
> + * is the CCB clock divided by 16.
> + * So baud rate is CCB/(16*divider)
> + */
> if (serial_hds[0]) {
> - serial_mm_init(&ccsr->iomem, E500_DUART_OFFSET(0),
> - 0, qdev_get_gpio_in(ccsr->pic, 16 + 26), 399193,
> + serial_mm_init(&ccsr->iomem, E500_DUART_OFFSET(0), 0,
> + qdev_get_gpio_in(ccsr->pic, 16 + 26),
> + ccsr->ccb_freq / 16u,
> serial_hds[0], DEVICE_BIG_ENDIAN);
> }
>
> if (serial_hds[1]) {
> - serial_mm_init(&ccsr->iomem, E500_DUART_OFFSET(1),
> - 0, qdev_get_gpio_in(ccsr->pic, 16 + 26), 399193,
> + serial_mm_init(&ccsr->iomem, E500_DUART_OFFSET(1), 0,
> + qdev_get_gpio_in(ccsr->pic, 16 + 26),
> + ccsr->ccb_freq / 16u,
> serial_hds[1], DEVICE_BIG_ENDIAN);
> }
>
> @@ -290,6 +297,7 @@ static Property e500_ccsr_props[] = {
> DEFINE_PROP_UINT32("base", CCSRState, defbase, 0xff700000),
> DEFINE_PROP_UINT32("ram-size", CCSRState, ram_size, 0),
> DEFINE_PROP_UINT32("porpllsr", CCSRState, porpllsr, 0),
> + DEFINE_PROP_UINT32("ccb-freq", CCSRState, ccb_freq,
> 333333333u),
And shouldn't this use the #define as the default value?
> /* "mpic-model" aliased from MPIC */
> DEFINE_PROP_END_OF_LIST()
> };
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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next prev parent reply other threads:[~2017-12-05 10:23 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-26 21:58 [Qemu-devel] [PATCH 00/17] Add MVME3100 PPC SBC v2 Michael Davidsaver
2017-11-26 21:58 ` [Qemu-devel] [PATCH 01/17] openpic: debug w/ info_report() Michael Davidsaver
2017-11-27 7:09 ` David Gibson
2017-11-26 21:59 ` [Qemu-devel] [PATCH 02/17] i2c: start trace-events Michael Davidsaver
2017-11-26 21:59 ` [Qemu-devel] [PATCH 03/17] i2c: add mpc8540 i2c controller Michael Davidsaver
2017-11-27 7:12 ` David Gibson
2017-11-27 19:05 ` Michael Davidsaver
2017-11-29 1:32 ` David Gibson
2017-11-26 21:59 ` [Qemu-devel] [PATCH 04/17] qtest: add e500_i2c_create() Michael Davidsaver
2017-11-26 21:59 ` [Qemu-devel] [PATCH 05/17] timer: generalize Dallas/Maxim RTC i2c devices Michael Davidsaver
2017-11-30 5:13 ` David Gibson
2017-12-03 21:15 ` Michael Davidsaver
2017-12-06 11:14 ` David Gibson
2017-12-28 4:11 ` Michael Davidsaver
2017-11-26 21:59 ` [Qemu-devel] [PATCH 06/17] tests: rewrite testing for DS RTC devices Michael Davidsaver
2017-11-26 21:59 ` [Qemu-devel] [PATCH 07/17] e500: fix pci host bridge class/type Michael Davidsaver
2017-11-27 7:15 ` David Gibson
2017-11-26 21:59 ` [Qemu-devel] [PATCH 08/17] e500: additional CCSR registers Michael Davidsaver
2017-12-04 9:30 ` David Gibson
2017-12-06 3:13 ` David Gibson
2017-11-26 21:59 ` [Qemu-devel] [PATCH 09/17] e500: move mpic under CCSR Michael Davidsaver
2017-12-05 6:34 ` David Gibson
2017-11-26 21:59 ` [Qemu-devel] [PATCH 10/17] e500: move uarts CCSR Michael Davidsaver
2017-12-05 6:37 ` David Gibson
2017-11-26 21:59 ` [Qemu-devel] [PATCH 11/17] e500: derive baud from CCB clock Michael Davidsaver
2017-12-05 6:40 ` David Gibson [this message]
2017-11-26 21:59 ` [Qemu-devel] [PATCH 12/17] e500: add i2c controller to CCSR Michael Davidsaver
2017-12-05 6:49 ` David Gibson
2017-12-06 3:26 ` Michael Davidsaver
2017-11-26 21:59 ` [Qemu-devel] [PATCH 13/17] e500: move PCI host bridge into CCSR Michael Davidsaver
2017-12-05 6:53 ` David Gibson
2017-12-06 3:42 ` Michael Davidsaver
2017-12-06 11:11 ` David Gibson
2017-12-27 3:53 ` Michael Davidsaver
2017-11-26 21:59 ` [Qemu-devel] [PATCH 14/17] e500: split mpc8544ds specific initialization Michael Davidsaver
2017-12-19 5:05 ` David Gibson
2017-11-26 21:59 ` [Qemu-devel] [PATCH 15/17] ppc: add mvme3100 machine Michael Davidsaver
2017-12-20 4:05 ` David Gibson
2017-11-26 21:59 ` [Qemu-devel] [PATCH 16/17] tests: run ds-rtc-i2c-test w/ ppc/mvme3100 Michael Davidsaver
2017-12-19 5:06 ` David Gibson
2017-11-26 21:59 ` [Qemu-devel] [PATCH 17/17] tests: add mvme3100-test Michael Davidsaver
2017-12-19 5:06 ` David Gibson
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