From: Adrien Mazarguil <adrien.mazarguil@6wind.com>
To: Matan Azrad <matan@mellanox.com>
Cc: dev@dpdk.org
Subject: Re: [PATCH v2 5/8] net/mlx4: merge Tx queue rings management
Date: Wed, 6 Dec 2017 17:22:29 +0100 [thread overview]
Message-ID: <20171206162229.GH4062@6wind.com> (raw)
In-Reply-To: <1512571693-15338-6-git-send-email-matan@mellanox.com>
On Wed, Dec 06, 2017 at 02:48:10PM +0000, Matan Azrad wrote:
> The Tx queue send ring was managed by Tx block head,tail,count and mask
> management variables which were used for managing the send queue remain
> space and next places of empty or completed work queue entries.
>
> This method suffered from an actual addresses recalculation per packet,
> an unnecessary Tx block based calculations and an expensive dual
> management of Tx rings.
>
> Move send queue ring calculation to be based on actual addresses while
> managing it by descriptors ring indexes.
>
> Add new work queue entry pointer to the descriptor element to hold the
> appropriate entry in the send queue.
>
> Signed-off-by: Matan Azrad <matan@mellanox.com>
A few more comments on this version below.
<snip>
> diff --git a/drivers/net/mlx4/mlx4_rxtx.c b/drivers/net/mlx4/mlx4_rxtx.c
> index adf02c0..2467d1d 100644
> --- a/drivers/net/mlx4/mlx4_rxtx.c
> +++ b/drivers/net/mlx4/mlx4_rxtx.c
> @@ -61,9 +61,6 @@
> #include "mlx4_rxtx.h"
> #include "mlx4_utils.h"
>
> -#define WQE_ONE_DATA_SEG_SIZE \
> - (sizeof(struct mlx4_wqe_ctrl_seg) + sizeof(struct mlx4_wqe_data_seg))
> -
> /**
> * Pointer-value pair structure used in tx_post_send for saving the first
> * DWORD (32 byte) of a TXBB.
> @@ -268,52 +265,48 @@ struct pv {
> *
> * @param sq
> * Pointer to the SQ structure.
> - * @param index
> - * Index of the freed WQE.
> - * @param num_txbbs
> - * Number of blocks to stamp.
> - * If < 0 the routine will use the size written in the WQ entry.
> - * @param owner
> - * The value of the WQE owner bit to use in the stamp.
> + * @param wqe
> + * Pointer of WQE address to stamp.
Clarification on what happens on return is primarily needed here actually:
@param[in, out] wqe
Pointer of WQE address to stamp. This value is modified on return to
store the address of the next WQE.
> *
> * @return
> - * The number of Tx basic blocs (TXBB) the WQE contained.
> + * WQE size and updates WQE address to the next WQE.
You can leave the previous comment if @param wqe is properly documented.
<snip>
> @@ -654,7 +639,7 @@ struct pv {
>
> #ifndef NDEBUG
> /* Poisoning. */
> - memset(elt, 0x66, sizeof(*elt));
> + memset(elt->buf, 0x66, sizeof(struct rte_mbuf));
This likely causes a crash (did you test in debug mode?) the goal is to
poison the buffer address, not the entire mbuf. This should read:
memset(&elt->buf, 0x66, sizeof(elt->buf));
--
Adrien Mazarguil
6WIND
next prev parent reply other threads:[~2017-12-06 16:22 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-28 12:19 [PATCH 0/8] improve mlx4 Tx performance Matan Azrad
2017-11-28 12:19 ` [PATCH 1/8] net/mlx4: fix Tx packet drop application report Matan Azrad
2017-12-06 10:57 ` Adrien Mazarguil
2017-11-28 12:19 ` [PATCH 2/8] net/mlx4: remove unnecessary Tx wraparound checks Matan Azrad
2017-12-06 10:57 ` Adrien Mazarguil
2017-11-28 12:19 ` [PATCH 3/8] net/mlx4: remove restamping from Tx error path Matan Azrad
2017-12-06 10:58 ` Adrien Mazarguil
2017-11-28 12:19 ` [PATCH 4/8] net/mlx4: optimize Tx multi-segment case Matan Azrad
2017-12-06 10:58 ` Adrien Mazarguil
2017-12-06 11:29 ` Matan Azrad
2017-12-06 11:55 ` Adrien Mazarguil
2017-11-28 12:19 ` [PATCH 5/8] net/mlx4: merge Tx queue rings management Matan Azrad
2017-12-06 10:58 ` Adrien Mazarguil
2017-12-06 11:43 ` Matan Azrad
2017-12-06 12:09 ` Adrien Mazarguil
2017-11-28 12:19 ` [PATCH 6/8] net/mlx4: mitigate Tx send entry size calculations Matan Azrad
2017-12-06 10:59 ` Adrien Mazarguil
2017-11-28 12:19 ` [PATCH 7/8] net/mlx4: align Tx descriptors number Matan Azrad
2017-12-06 10:59 ` Adrien Mazarguil
2017-12-06 11:44 ` Matan Azrad
2017-11-28 12:19 ` [PATCH 8/8] net/mlx4: remove Tx completion elements counter Matan Azrad
2017-12-06 10:59 ` Adrien Mazarguil
2017-12-06 14:48 ` [PATCH v2 0/8] improve mlx4 Tx performance Matan Azrad
2017-12-06 14:48 ` [PATCH v2 1/8] net/mlx4: fix Tx packet drop application report Matan Azrad
2017-12-06 14:48 ` [PATCH v2 2/8] net/mlx4: remove unnecessary Tx wraparound checks Matan Azrad
2017-12-06 14:48 ` [PATCH v2 3/8] net/mlx4: remove restamping from Tx error path Matan Azrad
2017-12-06 14:48 ` [PATCH v2 4/8] net/mlx4: optimize Tx multi-segment case Matan Azrad
2017-12-06 16:22 ` Adrien Mazarguil
2017-12-06 14:48 ` [PATCH v2 5/8] net/mlx4: merge Tx queue rings management Matan Azrad
2017-12-06 16:22 ` Adrien Mazarguil [this message]
2017-12-06 14:48 ` [PATCH v2 6/8] net/mlx4: mitigate Tx send entry size calculations Matan Azrad
2017-12-06 14:48 ` [PATCH v2 7/8] net/mlx4: align Tx descriptors number Matan Azrad
2017-12-06 16:22 ` Adrien Mazarguil
2017-12-06 17:24 ` Matan Azrad
2017-12-06 14:48 ` [PATCH v2 8/8] net/mlx4: remove Tx completion elements counter Matan Azrad
2017-12-06 16:22 ` Adrien Mazarguil
2017-12-06 17:57 ` [PATCH v3 0/8] improve mlx4 Tx performance Matan Azrad
2017-12-06 17:57 ` [PATCH v3 1/8] net/mlx4: fix Tx packet drop application report Matan Azrad
2017-12-06 17:57 ` [PATCH v3 2/8] net/mlx4: remove unnecessary Tx wraparound checks Matan Azrad
2017-12-06 17:57 ` [PATCH v3 3/8] net/mlx4: remove restamping from Tx error path Matan Azrad
2017-12-06 17:57 ` [PATCH v3 4/8] net/mlx4: optimize Tx multi-segment case Matan Azrad
2017-12-06 17:57 ` [PATCH v3 5/8] net/mlx4: merge Tx queue rings management Matan Azrad
2017-12-06 17:57 ` [PATCH v3 6/8] net/mlx4: mitigate Tx send entry size calculations Matan Azrad
2017-12-06 17:57 ` [PATCH v3 7/8] net/mlx4: align Tx descriptors number Matan Azrad
2017-12-06 17:57 ` [PATCH v3 8/8] net/mlx4: remove Tx completion elements counter Matan Azrad
2017-12-07 10:56 ` [PATCH v3 0/8] improve mlx4 Tx performance Adrien Mazarguil
2017-12-10 10:22 ` Shahaf Shuler
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