From: Andi Kleen <ak@linux.intel.com>
To: Jan Dakinevich <jan.dakinevich@virtuozzo.com>
Cc: linux-kernel@vger.kernel.org,
"Denis V . Lunev" <den@virtuozzo.com>,
"Roman Kagan" <rkagan@virtuozzo.com>,
"Peter Zijlstra" <peterz@infradead.org>,
"Ingo Molnar" <mingo@redhat.com>,
"Arnaldo Carvalho de Melo" <acme@kernel.org>,
"Alexander Shishkin" <alexander.shishkin@linux.intel.com>,
"Jiri Olsa" <jolsa@redhat.com>,
"Namhyung Kim" <namhyung@kernel.org>,
"Thomas Gleixner" <tglx@linutronix.de>,
"H. Peter Anvin" <hpa@zytor.com>,
x86@kernel.org, "Paolo Bonzini" <pbonzini@redhat.com>,
"Radim Krčmář" <rkrcmar@redhat.com>,
"Kan Liang" <kan.liang@intel.com>,
"Stephane Eranian" <eranian@google.com>,
"Colin King" <colin.king@canonical.com>,
"Sebastian Andrzej Siewior" <bigeasy@linutronix.de>,
"Jin Yao" <yao.jin@linux.intel.com>,
kvm@vger.kernel.org
Subject: Re: [PATCH RFC 2/2] KVM: x86/vPMU: ignore access to LBR-related MSRs
Date: Wed, 6 Dec 2017 09:55:43 -0800 [thread overview]
Message-ID: <20171206175543.GM3070@tassilo.jf.intel.com> (raw)
In-Reply-To: <20171206200207.11094037@virtuozzo.com>
On Wed, Dec 06, 2017 at 08:02:07PM +0300, Jan Dakinevich wrote:
> On Wed, 6 Dec 2017 07:57:28 -0800
> Andi Kleen <ak@linux.intel.com> wrote:
>
> >
> > If you do all this it's only a small step to fully enable LBRs for
> > guests.
>
> It is quite simple in a case where guest LBR-related MSRs matches host
> ones. They could be handled by MSR load/store areas, I suppose.
There is already a LBR control to enable/disable I believe.
You don't want to save/restore all MSRs on every entry/exit
because that would be slow. The normal Linux context switch can do it.
>
> In other cases, it could be expected the different amount of these MSRs
> and different theirs base values (e.g. Nehalem vs Core). Guest MSRs
> could be both subset and superset of host MSRs, so additional efforts
> to support this would be required.
In this case ignoring would be sufficient I suppose. But for the case
when everything matches it should work.
-Andi
next prev parent reply other threads:[~2017-12-06 17:55 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-06 11:43 [PATCH RFC 0/2] ignore LBR-related MSRs Jan Dakinevich
2017-12-06 11:43 ` Jan Dakinevich
2017-12-06 11:43 ` [PATCH RFC 1/2] perf/x86/intel: make reusable LBR initialization code Jan Dakinevich
2017-12-06 11:43 ` Jan Dakinevich
2017-12-06 12:51 ` Peter Zijlstra
2017-12-06 12:51 ` Peter Zijlstra
2017-12-06 11:43 ` [PATCH RFC 2/2] KVM: x86/vPMU: ignore access to LBR-related MSRs Jan Dakinevich
2017-12-06 11:43 ` Jan Dakinevich
2017-12-06 12:52 ` Peter Zijlstra
2017-12-06 15:57 ` Andi Kleen
2017-12-06 17:02 ` Jan Dakinevich
2017-12-06 17:55 ` Andi Kleen [this message]
2017-12-06 15:06 ` [PATCH RFC 0/2] ignore " Konrad Rzeszutek Wilk
2017-12-06 15:06 ` Konrad Rzeszutek Wilk
2017-12-06 16:39 ` Jan Dakinevich
2017-12-06 16:39 ` Jan Dakinevich
2017-12-06 16:45 ` Denis V. Lunev
2017-12-06 16:45 ` Denis V. Lunev
2017-12-06 16:23 ` Jiri Olsa
2017-12-06 16:23 ` Jiri Olsa
2017-12-20 16:26 ` Jan Dakinevich
2017-12-20 16:26 ` Jan Dakinevich
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