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From: Mauro Carvalho Chehab <mchehab@s-opensource.com>
To: "Mani, Rajmohan" <rajmohan.mani@intel.com>
Cc: "Zhi, Yong" <yong.zhi@intel.com>,
	"linux-media@vger.kernel.org" <linux-media@vger.kernel.org>,
	"sakari.ailus@linux.intel.com" <sakari.ailus@linux.intel.com>,
	"Zheng, Jian Xu" <jian.xu.zheng@intel.com>,
	"Toivonen, Tuukka" <tuukka.toivonen@intel.com>,
	"Hu, Jerry W" <jerry.w.hu@intel.com>,
	"arnd@arndb.de" <arnd@arndb.de>, "hch@lst.de" <hch@lst.de>,
	"robin.murphy@arm.com" <robin.murphy@arm.com>,
	"iommu@lists.linux-foundation.org"
	<iommu@lists.linux-foundation.org>
Subject: Re: [PATCH v4 00/12] Intel IPU3 ImgU patchset
Date: Wed, 20 Dec 2017 11:57:44 -0200	[thread overview]
Message-ID: <20171220115744.591a12e2@vento.lan> (raw)
In-Reply-To: <6F87890CF0F5204F892DEA1EF0D77A5972FD4195@FMSMSX114.amr.corp.intel.com>

Hi,

Em Fri, 17 Nov 2017 02:58:56 +0000
"Mani, Rajmohan" <rajmohan.mani@intel.com> escreveu:

> Here is an update on the IPU3 documentation that we are currently working on.
> 
> Image processing in IPU3 relies on the following.
> 
> 1) HW configuration to enable ISP and
> 2) setting customer specific 3A Tuning / Algorithm Parameters to achieve desired image quality. 
> 
> We intend to provide documentation on ImgU driver programming interface to help users of this driver to configure and enable ISP HW to meet their needs.  This documentation will include details on complete V4L2 Kernel driver interface and IO-Control parameters, except for the ISP internal algorithm and its parameters (which is Intel proprietary IP).

Sakari asked me to take a look on this thread, specifically on this
email. I took a look on the other e-mails from this thread that are
discussing about this IP block.

I understand that Intel wants to keep their internal 3A algorithm
protected, just like other vendors protect their own algos. It was never
a requirement to open whatever algorithm are used inside a hardware
(or firmware). The only requirement is that firmwares should be licensed
with redistribution permission, ideally merged at linux-firmware git
tree.

Yet, what I don't understand is why Intel also wants to also protect
the interface for such 3A hardware/firmware algorithm. The parameters
that are passed from an userspace application to Intel ISP logic 
doesn't contain the algorithm itself. What's the issue of documenting
the meaning of each parameter?


Thanks,
Mauro

  parent reply	other threads:[~2017-12-20 13:57 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-18  3:46 [PATCH v4 00/12] Intel IPU3 ImgU patchset Yong Zhi
2017-10-18  3:46 ` Yong Zhi
     [not found] ` <1508298408-25822-1-git-send-email-yong.zhi-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
2017-10-18  6:23   ` Christoph Hellwig
2017-10-18  6:23     ` Christoph Hellwig
     [not found]     ` <20171018062319.GB10605-jcswGhMUV9g@public.gmane.org>
2017-10-18 14:42       ` Zhi, Yong
2017-10-18 14:42         ` Zhi, Yong
2017-10-20  9:09 ` Sakari Ailus
     [not found]   ` <20171020090949.nhv74sfb5jjrtxhx-S+BSfZ9RZZmRSg0ZkenSGLdO1Tsj/99ntUK59QYPAWc@public.gmane.org>
2017-10-23 21:24     ` Zhi, Yong
2017-10-23 21:24       ` Zhi, Yong
2017-11-17  2:58 ` Mani, Rajmohan
2017-11-27  9:55   ` Hans Verkuil
2017-12-05  0:13     ` Mani, Rajmohan
2017-12-05  3:22       ` Tomasz Figa
2017-12-05  7:46         ` Hans Verkuil
2017-12-06  0:46           ` Mani, Rajmohan
2017-12-20 13:57   ` Mauro Carvalho Chehab [this message]
2017-12-26 22:30     ` Mani, Rajmohan
2018-02-07 23:02     ` Mani, Rajmohan
2018-02-21  1:56     ` Mani, Rajmohan
2018-02-21  1:56       ` Mani, Rajmohan
2018-03-28  3:14     ` Mani, Rajmohan
2018-03-28  3:14       ` Mani, Rajmohan
2018-04-04  1:07     ` Mani, Rajmohan
2018-04-04  1:07       ` Mani, Rajmohan

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