diff for duplicates of <20180105171828.GC24933@red-moon> diff --git a/a/1.txt b/N1/1.txt index 3cb9986..deaf3e7 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -67,7 +67,7 @@ Lorenzo > affected. > > I've tested here setting the PCI_PRIMARY_BUS register to 0x 00 ff 01 -> 00 (ignored-subord-secbus-primbus), and the whole scanning works +> 00? (ignored-subord-secbus-primbus), and the whole scanning works > again. > I fully agree that hardcoding is not the final fix, as this param > can be defined in a DT. @@ -77,12 +77,12 @@ Lorenzo > fixes all following pci boot errors: > > .. -> [ 0.466405] pci_bus 0000:05: [bus 05] partially hidden behind +> [??? 0.466405] pci_bus 0000:05: [bus 05] partially hidden behind > bridge 0000:01 [bus 01] > .. -> [ 0.466435] pci_bus 0000:02: busn_res: can not insert [bus 02-05] +> [??? 0.466435] pci_bus 0000:02: busn_res: can not insert [bus 02-05] > under [bus 01] (conflicts with (null) [bus 01]) -> [ 0.466454] pci_bus 0000:02: [bus 02-05] partially hidden behind +> [??? 0.466454] pci_bus 0000:02: [bus 02-05] partially hidden behind > bridge 0000:01 [bus 01] > .. > @@ -99,77 +99,77 @@ Lorenzo > Log showing the initial issue without any fixup: > > -> [ 0.116673] OF: PCI: host bridge /soc/pcie@0x01000000 ranges: -> [ 0.116692] OF: PCI: No bus range found for -> /soc/pcie@0x01000000, using [bus 00-ff] -> [ 0.116719] OF: PCI: IO 0x01f80000..0x01f8ffff -> 0x00000000 -> [ 0.116739] OF: PCI: MEM 0x01000000..0x01efffff -> 0x01000000 -> [ 0.337752] imx6q-pcie 1ffc000.pcie: link up -> [ 0.337771] imx6q-pcie 1ffc000.pcie: Link: Gen2 disabled -> [ 0.337785] imx6q-pcie 1ffc000.pcie: link up -> [ 0.337796] imx6q-pcie 1ffc000.pcie: Link up, Gen1 -> [ 0.338039] imx6q-pcie 1ffc000.pcie: PCI host bridge to bus 0000:00 -> [ 0.338055] pci_bus 0000:00: root bus resource [bus 00-ff] -> [ 0.338069] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] -> [ 0.338082] pci_bus 0000:00: root bus resource [mem +> [??? 0.116673] OF: PCI: host bridge /soc/pcie at 0x01000000 ranges: +> [??? 0.116692] OF: PCI:?? No bus range found for +> /soc/pcie at 0x01000000, using [bus 00-ff] +> [??? 0.116719] OF: PCI:??? IO 0x01f80000..0x01f8ffff -> 0x00000000 +> [??? 0.116739] OF: PCI:?? MEM 0x01000000..0x01efffff -> 0x01000000 +> [??? 0.337752] imx6q-pcie 1ffc000.pcie: link up +> [??? 0.337771] imx6q-pcie 1ffc000.pcie: Link: Gen2 disabled +> [??? 0.337785] imx6q-pcie 1ffc000.pcie: link up +> [??? 0.337796] imx6q-pcie 1ffc000.pcie: Link up, Gen1 +> [??? 0.338039] imx6q-pcie 1ffc000.pcie: PCI host bridge to bus 0000:00 +> [??? 0.338055] pci_bus 0000:00: root bus resource [bus 00-ff] +> [??? 0.338069] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] +> [??? 0.338082] pci_bus 0000:00: root bus resource [mem > 0x01000000-0x01efffff] -> [ 0.338094] pci_bus 0000:00: scanning bus -> [ 0.338127] pci 0000:00:00.0: [16c3:abcd] type 01 class 0x060400 -> [ 0.338151] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x000fffff] -> [ 0.338168] pci 0000:00:00.0: reg 0x38: [mem 0x00000000-0x0000ffff pref] -> [ 0.338204] pci 0000:00:00.0: calling pci_fixup_ide_bases+0x0/0x4c -> [ 0.338259] pci 0000:00:00.0: supports D1 -> [ 0.338267] pci 0000:00:00.0: PME# supported from D0 D1 D3hot D3cold -> [ 0.338276] pci 0000:00:00.0: PME# disabled -> [ 0.338512] pci_bus 0000:00: fixups for bus -> [ 0.338525] PCI: bus0: Fast back to back transfers disabled -> [ 0.338541] pci 0000:00:00.0: scanning [bus 01-01] behind bridge, pass 0 -> [ 0.338673] pci_bus 0000:01: scanning bus -> [ 0.338773] pci 0000:01:00.0: [10b5:8604] type 01 class 0x060400 -> [ 0.338816] pci 0000:01:00.0: calling ventana_pciesw_early_fixup+0x0/0xa4 -> [ 0.467817] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x0001ffff] -> [ 0.467999] pci 0000:01:00.0: calling pci_fixup_ide_bases+0x0/0x4c -> [ 0.468467] pci 0000:01:00.0: PME# supported from D0 D3hot D3cold -> [ 0.468491] pci 0000:01:00.0: PME# disabled -> [ 0.468795] pci_bus 0000:01: fixups for bus -> [ 0.468854] PCI: bus1: Fast back to back transfers disabled -> [ 0.468877] pci 0000:01:00.0: scanning [bus 00-00] behind bridge, pass 0 -> [ 0.468886] pci 0000:01:00.0: bridge configuration invalid ([bus +> [??? 0.338094] pci_bus 0000:00: scanning bus +> [??? 0.338127] pci 0000:00:00.0: [16c3:abcd] type 01 class 0x060400 +> [??? 0.338151] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x000fffff] +> [??? 0.338168] pci 0000:00:00.0: reg 0x38: [mem 0x00000000-0x0000ffff pref] +> [??? 0.338204] pci 0000:00:00.0: calling pci_fixup_ide_bases+0x0/0x4c +> [??? 0.338259] pci 0000:00:00.0: supports D1 +> [??? 0.338267] pci 0000:00:00.0: PME# supported from D0 D1 D3hot D3cold +> [??? 0.338276] pci 0000:00:00.0: PME# disabled +> [??? 0.338512] pci_bus 0000:00: fixups for bus +> [??? 0.338525] PCI: bus0: Fast back to back transfers disabled +> [??? 0.338541] pci 0000:00:00.0: scanning [bus 01-01] behind bridge, pass 0 +> [??? 0.338673] pci_bus 0000:01: scanning bus +> [??? 0.338773] pci 0000:01:00.0: [10b5:8604] type 01 class 0x060400 +> [??? 0.338816] pci 0000:01:00.0: calling ventana_pciesw_early_fixup+0x0/0xa4 +> [??? 0.467817] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x0001ffff] +> [??? 0.467999] pci 0000:01:00.0: calling pci_fixup_ide_bases+0x0/0x4c +> [??? 0.468467] pci 0000:01:00.0: PME# supported from D0 D3hot D3cold +> [??? 0.468491] pci 0000:01:00.0: PME# disabled +> [??? 0.468795] pci_bus 0000:01: fixups for bus +> [??? 0.468854] PCI: bus1: Fast back to back transfers disabled +> [??? 0.468877] pci 0000:01:00.0: scanning [bus 00-00] behind bridge, pass 0 +> [??? 0.468886] pci 0000:01:00.0: bridge configuration invalid ([bus > 00-00]), reconfiguring -> [ 0.468939] pci 0000:01:00.0: scanning [bus 00-00] behind bridge, pass 1 -> [ 0.469265] pci_bus 0000:02: busn_res: can not insert [bus 02-01] +> [??? 0.468939] pci 0000:01:00.0: scanning [bus 00-00] behind bridge, pass 1 +> [??? 0.469265] pci_bus 0000:02: busn_res: can not insert [bus 02-01] > under [bus 01] (conflicts with (null) [bus 01]) -> [ 0.469282] pci_bus 0000:02: scanning bus -> [ 0.469554] pci_bus 0000:02: fixups for bus -> [ 0.469559] PCI: bus2: Fast back to back transfers enabled -> [ 0.469572] pci_bus 0000:02: bus scan returning with max=02 -> [ 0.469582] pci_bus 0000:02: busn_res: [bus 02-01] end is updated to 02 -> [ 0.469593] pci_bus 0000:02: busn_res: can not insert [bus 02] +> [??? 0.469282] pci_bus 0000:02: scanning bus +> [??? 0.469554] pci_bus 0000:02: fixups for bus +> [??? 0.469559] PCI: bus2: Fast back to back transfers enabled +> [??? 0.469572] pci_bus 0000:02: bus scan returning with max=02 +> [??? 0.469582] pci_bus 0000:02: busn_res: [bus 02-01] end is updated to 02 +> [??? 0.469593] pci_bus 0000:02: busn_res: can not insert [bus 02] > under [bus 01] (conflicts with (null) [bus 01]) -> [ 0.469615] pci_bus 0000:02: [bus 02] partially hidden behind +> [??? 0.469615] pci_bus 0000:02: [bus 02] partially hidden behind > bridge 0000:01 [bus 01] -> [ 0.469636] pci_bus 0000:01: bus scan returning with max=02 -> [ 0.469643] pci 0000:00:00.0: bridge has subordinate 01 but max busn 02 -> [ 0.469661] pci 0000:00:00.0: scanning [bus 01-01] behind bridge, pass 1 -> [ 0.469671] pci_bus 0000:00: bus scan returning with max=01 -> [ 0.469791] pci 0000:00:00.0: fixup irq: got 298 -> [ 0.469800] pci 0000:00:00.0: assigning IRQ 298 -> [ 0.469849] pci 0000:01:00.0: fixup irq: got 298 -> [ 0.469856] pci 0000:01:00.0: assigning IRQ 298 -> [ 0.469946] pci 0000:00:00.0: BAR 0: assigned [mem 0x01000000-0x010fffff] -> [ 0.469965] pci 0000:00:00.0: BAR 8: assigned [mem 0x01100000-0x011fffff] -> [ 0.469980] pci 0000:00:00.0: BAR 6: assigned [mem +> [??? 0.469636] pci_bus 0000:01: bus scan returning with max=02 +> [??? 0.469643] pci 0000:00:00.0: bridge has subordinate 01 but max busn 02 +> [??? 0.469661] pci 0000:00:00.0: scanning [bus 01-01] behind bridge, pass 1 +> [??? 0.469671] pci_bus 0000:00: bus scan returning with max=01 +> [??? 0.469791] pci 0000:00:00.0: fixup irq: got 298 +> [??? 0.469800] pci 0000:00:00.0: assigning IRQ 298 +> [??? 0.469849] pci 0000:01:00.0: fixup irq: got 298 +> [??? 0.469856] pci 0000:01:00.0: assigning IRQ 298 +> [??? 0.469946] pci 0000:00:00.0: BAR 0: assigned [mem 0x01000000-0x010fffff] +> [??? 0.469965] pci 0000:00:00.0: BAR 8: assigned [mem 0x01100000-0x011fffff] +> [??? 0.469980] pci 0000:00:00.0: BAR 6: assigned [mem > 0x01200000-0x0120ffff pref] -> [ 0.469997] pci 0000:01:00.0: BAR 0: assigned [mem 0x01100000-0x0111ffff] -> [ 0.470026] pci 0000:01:00.0: PCI bridge to [bus 02] -> [ 0.470108] pci 0000:00:00.0: PCI bridge to [bus 01] -> [ 0.470121] pci 0000:00:00.0: bridge window [mem 0x01100000-0x011fffff] -> [ 0.470381] pcieport 0000:00:00.0: Signaling PME through PCIe PME +> [??? 0.469997] pci 0000:01:00.0: BAR 0: assigned [mem 0x01100000-0x0111ffff] +> [??? 0.470026] pci 0000:01:00.0: PCI bridge to [bus 02] +> [??? 0.470108] pci 0000:00:00.0: PCI bridge to [bus 01] +> [??? 0.470121] pci 0000:00:00.0:?? bridge window [mem 0x01100000-0x011fffff] +> [??? 0.470381] pcieport 0000:00:00.0: Signaling PME through PCIe PME > interrupt -> [ 0.470397] pci 0000:01:00.0: Signaling PME through PCIe PME interrupt -> [ 0.470412] pcie_pme 0000:00:00.0:pcie001: service driver pcie_pme loaded -> [ 0.470660] pcieport 0000:01:00.0: enabling device (0140 -> 0142) -> [ 0.470788] pcieport 0000:01:00.0: enabling bus mastering +> [??? 0.470397] pci 0000:01:00.0: Signaling PME through PCIe PME interrupt +> [??? 0.470412] pcie_pme 0000:00:00.0:pcie001: service driver pcie_pme loaded +> [??? 0.470660] pcieport 0000:01:00.0: enabling device (0140 -> 0142) +> [??? 0.470788] pcieport 0000:01:00.0: enabling bus mastering > > > @@ -182,42 +182,42 @@ Lorenzo > [ Node 4 | node-4 ] lspci -v > 00:00.0 PCI bridge: Synopsys, Inc. Device abcd (rev 01) (prog-if 00 > [Normal decode]) -> Flags: bus master, fast devsel, latency 0, IRQ 298 -> Memory at 01000000 (32-bit, non-prefetchable) [size=1M] -> Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 -> I/O behind bridge: None -> Memory behind bridge: 01100000-011fffff [size=1M] -> Prefetchable memory behind bridge: None -> [virtual] Expansion ROM at 01200000 [disabled] [size=64K] -> Capabilities: [40] Power Management version 3 -> Capabilities: [50] MSI: Enable- Count=1/1 Maskable+ 64bit+ -> Capabilities: [70] Express Root Port (Slot-), MSI 00 -> Capabilities: [100] Advanced Error Reporting -> Capabilities: [140] Virtual Channel -> Kernel driver in use: pcieport +> ??? Flags: bus master, fast devsel, latency 0, IRQ 298 +> ??? Memory at 01000000 (32-bit, non-prefetchable) [size=1M] +> ??? Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 +> ??? I/O behind bridge: None +> ??? Memory behind bridge: 01100000-011fffff [size=1M] +> ??? Prefetchable memory behind bridge: None +> ??? [virtual] Expansion ROM at 01200000 [disabled] [size=64K] +> ??? Capabilities: [40] Power Management version 3 +> ??? Capabilities: [50] MSI: Enable- Count=1/1 Maskable+ 64bit+ +> ??? Capabilities: [70] Express Root Port (Slot-), MSI 00 +> ??? Capabilities: [100] Advanced Error Reporting +> ??? Capabilities: [140] Virtual Channel +> ??? Kernel driver in use: pcieport > lspci: Unable to load libkmod resources: error -12 > > 01:00.0 PCI bridge: PLX Technology, Inc. PEX 8604 4-lane, 4-Port PCI > Express Gen 2 (5.0 GT/s) Switch (rev ba) (prog-if 00 [Normal > decode]) -> Flags: bus master, fast devsel, latency 0, IRQ 298 -> Memory at 01100000 (32-bit, non-prefetchable) [size=128K] -> Bus: primary=01, secondary=02, subordinate=02, sec-latency=0 -> I/O behind bridge: None -> Memory behind bridge: None -> Prefetchable memory behind bridge: None -> Capabilities: [40] Power Management version 3 -> Capabilities: [48] MSI: Enable- Count=1/4 Maskable+ 64bit+ -> Capabilities: [68] Express Upstream Port, MSI 00 -> Capabilities: [a4] Subsystem: PLX Technology, Inc. PEX 8604 +> ??? Flags: bus master, fast devsel, latency 0, IRQ 298 +> ??? Memory at 01100000 (32-bit, non-prefetchable) [size=128K] +> ??? Bus: primary=01, secondary=02, subordinate=02, sec-latency=0 +> ??? I/O behind bridge: None +> ??? Memory behind bridge: None +> ??? Prefetchable memory behind bridge: None +> ??? Capabilities: [40] Power Management version 3 +> ??? Capabilities: [48] MSI: Enable- Count=1/4 Maskable+ 64bit+ +> ??? Capabilities: [68] Express Upstream Port, MSI 00 +> ??? Capabilities: [a4] Subsystem: PLX Technology, Inc. PEX 8604 > 4-lane, 4-Port PCI Express Gen 2 (5.0 GT/s) Switch -> Capabilities: [100] Device Serial Number ba-86-01-10-b5-df-0e-00 -> Capabilities: [fb4] Advanced Error Reporting -> Capabilities: [138] Power Budgeting <?> -> Capabilities: [148] Virtual Channel -> Capabilities: [448] Vendor Specific Information: ID=0000 Rev=0 +> ??? Capabilities: [100] Device Serial Number ba-86-01-10-b5-df-0e-00 +> ??? Capabilities: [fb4] Advanced Error Reporting +> ??? Capabilities: [138] Power Budgeting <?> +> ??? Capabilities: [148] Virtual Channel +> ??? Capabilities: [448] Vendor Specific Information: ID=0000 Rev=0 > Len=0cc <?> -> Capabilities: [950] Vendor Specific Information: ID=0001 Rev=0 +> ??? Capabilities: [950] Vendor Specific Information: ID=0001 Rev=0 > Len=010 <?> -> Kernel driver in use: pcieport +> ??? Kernel driver in use: pcieport > [ Node 4 | node-4 ] diff --git a/a/content_digest b/N1/content_digest index 08582e3..288c6ba 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -2,16 +2,10 @@ "ref\0a2d7afee-7a41-6da6-e5a4-a36a6fcde55d@ncentric.com\0" "ref\020180105123206.GA24511@e107981-ln.cambridge.arm.com\0" "ref\0ebf30c78-b772-6214-f441-c86ae7fdba7e@ncentric.com\0" - "From\0Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>\0" - "Subject\0Re: [PATCH] imx6: fix pcie enumeration\0" + "From\0lorenzo.pieralisi@arm.com (Lorenzo Pieralisi)\0" + "Subject\0[PATCH] imx6: fix pcie enumeration\0" "Date\0Fri, 5 Jan 2018 17:18:28 +0000\0" - "To\0Koen Vandeputte <koen.vandeputte@ncentric.com>\0" - "Cc\0Bjorn Helgaas <helgaas@kernel.org>" - linux-pci@vger.kernel.org - bhelgaas@google.com - Richard Zhu <hongxing.zhu@nxp.com> - Lucas Stach <l.stach@pengutronix.de> - " linux-arm-kernel@lists.infradead.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On Fri, Jan 05, 2018 at 02:39:57PM +0100, Koen Vandeputte wrote:\n" @@ -83,7 +77,7 @@ "> affected.\n" "> \n" "> I've tested here setting the PCI_PRIMARY_BUS register to 0x 00 ff 01\n" - "> 00\302\240 (ignored-subord-secbus-primbus), and the whole scanning works\n" + "> 00? (ignored-subord-secbus-primbus), and the whole scanning works\n" "> again.\n" "> I fully agree that hardcoding is not the final fix, as this param\n" "> can be defined in a DT.\n" @@ -93,12 +87,12 @@ "> fixes all following pci boot errors:\n" "> \n" "> ..\n" - "> [\302\240\302\240\302\240 0.466405] pci_bus 0000:05: [bus 05] partially hidden behind\n" + "> [??? 0.466405] pci_bus 0000:05: [bus 05] partially hidden behind\n" "> bridge 0000:01 [bus 01]\n" "> ..\n" - "> [\302\240\302\240\302\240 0.466435] pci_bus 0000:02: busn_res: can not insert [bus 02-05]\n" + "> [??? 0.466435] pci_bus 0000:02: busn_res: can not insert [bus 02-05]\n" "> under [bus 01] (conflicts with (null) [bus 01])\n" - "> [\302\240\302\240\302\240 0.466454] pci_bus 0000:02: [bus 02-05] partially hidden behind\n" + "> [??? 0.466454] pci_bus 0000:02: [bus 02-05] partially hidden behind\n" "> bridge 0000:01 [bus 01]\n" "> ..\n" "> \n" @@ -115,77 +109,77 @@ "> Log showing the initial issue without any fixup:\n" "> \n" "> \n" - "> [\302\240\302\240\302\240 0.116673] OF: PCI: host bridge /soc/pcie@0x01000000 ranges:\n" - "> [\302\240\302\240\302\240 0.116692] OF: PCI:\302\240\302\240 No bus range found for\n" - "> /soc/pcie@0x01000000, using [bus 00-ff]\n" - "> [\302\240\302\240\302\240 0.116719] OF: PCI:\302\240\302\240\302\240 IO 0x01f80000..0x01f8ffff -> 0x00000000\n" - "> [\302\240\302\240\302\240 0.116739] OF: PCI:\302\240\302\240 MEM 0x01000000..0x01efffff -> 0x01000000\n" - "> [\302\240\302\240\302\240 0.337752] imx6q-pcie 1ffc000.pcie: link up\n" - "> [\302\240\302\240\302\240 0.337771] imx6q-pcie 1ffc000.pcie: Link: Gen2 disabled\n" - "> [\302\240\302\240\302\240 0.337785] imx6q-pcie 1ffc000.pcie: link up\n" - "> [\302\240\302\240\302\240 0.337796] imx6q-pcie 1ffc000.pcie: Link up, Gen1\n" - "> [\302\240\302\240\302\240 0.338039] imx6q-pcie 1ffc000.pcie: PCI host bridge to bus 0000:00\n" - "> [\302\240\302\240\302\240 0.338055] pci_bus 0000:00: root bus resource [bus 00-ff]\n" - "> [\302\240\302\240\302\240 0.338069] pci_bus 0000:00: root bus resource [io 0x0000-0xffff]\n" - "> [\302\240\302\240\302\240 0.338082] pci_bus 0000:00: root bus resource [mem\n" + "> [??? 0.116673] OF: PCI: host bridge /soc/pcie at 0x01000000 ranges:\n" + "> [??? 0.116692] OF: PCI:?? No bus range found for\n" + "> /soc/pcie at 0x01000000, using [bus 00-ff]\n" + "> [??? 0.116719] OF: PCI:??? IO 0x01f80000..0x01f8ffff -> 0x00000000\n" + "> [??? 0.116739] OF: PCI:?? MEM 0x01000000..0x01efffff -> 0x01000000\n" + "> [??? 0.337752] imx6q-pcie 1ffc000.pcie: link up\n" + "> [??? 0.337771] imx6q-pcie 1ffc000.pcie: Link: Gen2 disabled\n" + "> [??? 0.337785] imx6q-pcie 1ffc000.pcie: link up\n" + "> [??? 0.337796] imx6q-pcie 1ffc000.pcie: Link up, Gen1\n" + "> [??? 0.338039] imx6q-pcie 1ffc000.pcie: PCI host bridge to bus 0000:00\n" + "> [??? 0.338055] pci_bus 0000:00: root bus resource [bus 00-ff]\n" + "> [??? 0.338069] pci_bus 0000:00: root bus resource [io 0x0000-0xffff]\n" + "> [??? 0.338082] pci_bus 0000:00: root bus resource [mem\n" "> 0x01000000-0x01efffff]\n" - "> [\302\240\302\240\302\240 0.338094] pci_bus 0000:00: scanning bus\n" - "> [\302\240\302\240\302\240 0.338127] pci 0000:00:00.0: [16c3:abcd] type 01 class 0x060400\n" - "> [\302\240\302\240\302\240 0.338151] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x000fffff]\n" - "> [\302\240\302\240\302\240 0.338168] pci 0000:00:00.0: reg 0x38: [mem 0x00000000-0x0000ffff pref]\n" - "> [\302\240\302\240\302\240 0.338204] pci 0000:00:00.0: calling pci_fixup_ide_bases+0x0/0x4c\n" - "> [\302\240\302\240\302\240 0.338259] pci 0000:00:00.0: supports D1\n" - "> [\302\240\302\240\302\240 0.338267] pci 0000:00:00.0: PME# supported from D0 D1 D3hot D3cold\n" - "> [\302\240\302\240\302\240 0.338276] pci 0000:00:00.0: PME# disabled\n" - "> [\302\240\302\240\302\240 0.338512] pci_bus 0000:00: fixups for bus\n" - "> [\302\240\302\240\302\240 0.338525] PCI: bus0: Fast back to back transfers disabled\n" - "> [\302\240\302\240\302\240 0.338541] pci 0000:00:00.0: scanning [bus 01-01] behind bridge, pass 0\n" - "> [\302\240\302\240\302\240 0.338673] pci_bus 0000:01: scanning bus\n" - "> [\302\240\302\240\302\240 0.338773] pci 0000:01:00.0: [10b5:8604] type 01 class 0x060400\n" - "> [\302\240\302\240\302\240 0.338816] pci 0000:01:00.0: calling ventana_pciesw_early_fixup+0x0/0xa4\n" - "> [\302\240\302\240\302\240 0.467817] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x0001ffff]\n" - "> [\302\240\302\240\302\240 0.467999] pci 0000:01:00.0: calling pci_fixup_ide_bases+0x0/0x4c\n" - "> [\302\240\302\240\302\240 0.468467] pci 0000:01:00.0: PME# supported from D0 D3hot D3cold\n" - "> [\302\240\302\240\302\240 0.468491] pci 0000:01:00.0: PME# disabled\n" - "> [\302\240\302\240\302\240 0.468795] pci_bus 0000:01: fixups for bus\n" - "> [\302\240\302\240\302\240 0.468854] PCI: bus1: Fast back to back transfers disabled\n" - "> [\302\240\302\240\302\240 0.468877] pci 0000:01:00.0: scanning [bus 00-00] behind bridge, pass 0\n" - "> [\302\240\302\240\302\240 0.468886] pci 0000:01:00.0: bridge configuration invalid ([bus\n" + "> [??? 0.338094] pci_bus 0000:00: scanning bus\n" + "> [??? 0.338127] pci 0000:00:00.0: [16c3:abcd] type 01 class 0x060400\n" + "> [??? 0.338151] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x000fffff]\n" + "> [??? 0.338168] pci 0000:00:00.0: reg 0x38: [mem 0x00000000-0x0000ffff pref]\n" + "> [??? 0.338204] pci 0000:00:00.0: calling pci_fixup_ide_bases+0x0/0x4c\n" + "> [??? 0.338259] pci 0000:00:00.0: supports D1\n" + "> [??? 0.338267] pci 0000:00:00.0: PME# supported from D0 D1 D3hot D3cold\n" + "> [??? 0.338276] pci 0000:00:00.0: PME# disabled\n" + "> [??? 0.338512] pci_bus 0000:00: fixups for bus\n" + "> [??? 0.338525] PCI: bus0: Fast back to back transfers disabled\n" + "> [??? 0.338541] pci 0000:00:00.0: scanning [bus 01-01] behind bridge, pass 0\n" + "> [??? 0.338673] pci_bus 0000:01: scanning bus\n" + "> [??? 0.338773] pci 0000:01:00.0: [10b5:8604] type 01 class 0x060400\n" + "> [??? 0.338816] pci 0000:01:00.0: calling ventana_pciesw_early_fixup+0x0/0xa4\n" + "> [??? 0.467817] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x0001ffff]\n" + "> [??? 0.467999] pci 0000:01:00.0: calling pci_fixup_ide_bases+0x0/0x4c\n" + "> [??? 0.468467] pci 0000:01:00.0: PME# supported from D0 D3hot D3cold\n" + "> [??? 0.468491] pci 0000:01:00.0: PME# disabled\n" + "> [??? 0.468795] pci_bus 0000:01: fixups for bus\n" + "> [??? 0.468854] PCI: bus1: Fast back to back transfers disabled\n" + "> [??? 0.468877] pci 0000:01:00.0: scanning [bus 00-00] behind bridge, pass 0\n" + "> [??? 0.468886] pci 0000:01:00.0: bridge configuration invalid ([bus\n" "> 00-00]), reconfiguring\n" - "> [\302\240\302\240\302\240 0.468939] pci 0000:01:00.0: scanning [bus 00-00] behind bridge, pass 1\n" - "> [\302\240\302\240\302\240 0.469265] pci_bus 0000:02: busn_res: can not insert [bus 02-01]\n" + "> [??? 0.468939] pci 0000:01:00.0: scanning [bus 00-00] behind bridge, pass 1\n" + "> [??? 0.469265] pci_bus 0000:02: busn_res: can not insert [bus 02-01]\n" "> under [bus 01] (conflicts with (null) [bus 01])\n" - "> [\302\240\302\240\302\240 0.469282] pci_bus 0000:02: scanning bus\n" - "> [\302\240\302\240\302\240 0.469554] pci_bus 0000:02: fixups for bus\n" - "> [\302\240\302\240\302\240 0.469559] PCI: bus2: Fast back to back transfers enabled\n" - "> [\302\240\302\240\302\240 0.469572] pci_bus 0000:02: bus scan returning with max=02\n" - "> [\302\240\302\240\302\240 0.469582] pci_bus 0000:02: busn_res: [bus 02-01] end is updated to 02\n" - "> [\302\240\302\240\302\240 0.469593] pci_bus 0000:02: busn_res: can not insert [bus 02]\n" + "> [??? 0.469282] pci_bus 0000:02: scanning bus\n" + "> [??? 0.469554] pci_bus 0000:02: fixups for bus\n" + "> [??? 0.469559] PCI: bus2: Fast back to back transfers enabled\n" + "> [??? 0.469572] pci_bus 0000:02: bus scan returning with max=02\n" + "> [??? 0.469582] pci_bus 0000:02: busn_res: [bus 02-01] end is updated to 02\n" + "> [??? 0.469593] pci_bus 0000:02: busn_res: can not insert [bus 02]\n" "> under [bus 01] (conflicts with (null) [bus 01])\n" - "> [\302\240\302\240\302\240 0.469615] pci_bus 0000:02: [bus 02] partially hidden behind\n" + "> [??? 0.469615] pci_bus 0000:02: [bus 02] partially hidden behind\n" "> bridge 0000:01 [bus 01]\n" - "> [\302\240\302\240\302\240 0.469636] pci_bus 0000:01: bus scan returning with max=02\n" - "> [\302\240\302\240\302\240 0.469643] pci 0000:00:00.0: bridge has subordinate 01 but max busn 02\n" - "> [\302\240\302\240\302\240 0.469661] pci 0000:00:00.0: scanning [bus 01-01] behind bridge, pass 1\n" - "> [\302\240\302\240\302\240 0.469671] pci_bus 0000:00: bus scan returning with max=01\n" - "> [\302\240\302\240\302\240 0.469791] pci 0000:00:00.0: fixup irq: got 298\n" - "> [\302\240\302\240\302\240 0.469800] pci 0000:00:00.0: assigning IRQ 298\n" - "> [\302\240\302\240\302\240 0.469849] pci 0000:01:00.0: fixup irq: got 298\n" - "> [\302\240\302\240\302\240 0.469856] pci 0000:01:00.0: assigning IRQ 298\n" - "> [\302\240\302\240\302\240 0.469946] pci 0000:00:00.0: BAR 0: assigned [mem 0x01000000-0x010fffff]\n" - "> [\302\240\302\240\302\240 0.469965] pci 0000:00:00.0: BAR 8: assigned [mem 0x01100000-0x011fffff]\n" - "> [\302\240\302\240\302\240 0.469980] pci 0000:00:00.0: BAR 6: assigned [mem\n" + "> [??? 0.469636] pci_bus 0000:01: bus scan returning with max=02\n" + "> [??? 0.469643] pci 0000:00:00.0: bridge has subordinate 01 but max busn 02\n" + "> [??? 0.469661] pci 0000:00:00.0: scanning [bus 01-01] behind bridge, pass 1\n" + "> [??? 0.469671] pci_bus 0000:00: bus scan returning with max=01\n" + "> [??? 0.469791] pci 0000:00:00.0: fixup irq: got 298\n" + "> [??? 0.469800] pci 0000:00:00.0: assigning IRQ 298\n" + "> [??? 0.469849] pci 0000:01:00.0: fixup irq: got 298\n" + "> [??? 0.469856] pci 0000:01:00.0: assigning IRQ 298\n" + "> [??? 0.469946] pci 0000:00:00.0: BAR 0: assigned [mem 0x01000000-0x010fffff]\n" + "> [??? 0.469965] pci 0000:00:00.0: BAR 8: assigned [mem 0x01100000-0x011fffff]\n" + "> [??? 0.469980] pci 0000:00:00.0: BAR 6: assigned [mem\n" "> 0x01200000-0x0120ffff pref]\n" - "> [\302\240\302\240\302\240 0.469997] pci 0000:01:00.0: BAR 0: assigned [mem 0x01100000-0x0111ffff]\n" - "> [\302\240\302\240\302\240 0.470026] pci 0000:01:00.0: PCI bridge to [bus 02]\n" - "> [\302\240\302\240\302\240 0.470108] pci 0000:00:00.0: PCI bridge to [bus 01]\n" - "> [\302\240\302\240\302\240 0.470121] pci 0000:00:00.0:\302\240\302\240 bridge window [mem 0x01100000-0x011fffff]\n" - "> [\302\240\302\240\302\240 0.470381] pcieport 0000:00:00.0: Signaling PME through PCIe PME\n" + "> [??? 0.469997] pci 0000:01:00.0: BAR 0: assigned [mem 0x01100000-0x0111ffff]\n" + "> [??? 0.470026] pci 0000:01:00.0: PCI bridge to [bus 02]\n" + "> [??? 0.470108] pci 0000:00:00.0: PCI bridge to [bus 01]\n" + "> [??? 0.470121] pci 0000:00:00.0:?? bridge window [mem 0x01100000-0x011fffff]\n" + "> [??? 0.470381] pcieport 0000:00:00.0: Signaling PME through PCIe PME\n" "> interrupt\n" - "> [\302\240\302\240\302\240 0.470397] pci 0000:01:00.0: Signaling PME through PCIe PME interrupt\n" - "> [\302\240\302\240\302\240 0.470412] pcie_pme 0000:00:00.0:pcie001: service driver pcie_pme loaded\n" - "> [\302\240\302\240\302\240 0.470660] pcieport 0000:01:00.0: enabling device (0140 -> 0142)\n" - "> [\302\240\302\240\302\240 0.470788] pcieport 0000:01:00.0: enabling bus mastering\n" + "> [??? 0.470397] pci 0000:01:00.0: Signaling PME through PCIe PME interrupt\n" + "> [??? 0.470412] pcie_pme 0000:00:00.0:pcie001: service driver pcie_pme loaded\n" + "> [??? 0.470660] pcieport 0000:01:00.0: enabling device (0140 -> 0142)\n" + "> [??? 0.470788] pcieport 0000:01:00.0: enabling bus mastering\n" "> \n" "> \n" "> \n" @@ -198,44 +192,44 @@ "> [ Node 4 | node-4 ] lspci -v\n" "> 00:00.0 PCI bridge: Synopsys, Inc. Device abcd (rev 01) (prog-if 00\n" "> [Normal decode])\n" - "> \302\240\302\240\302\240 Flags: bus master, fast devsel, latency 0, IRQ 298\n" - "> \302\240\302\240\302\240 Memory at 01000000 (32-bit, non-prefetchable) [size=1M]\n" - "> \302\240\302\240\302\240 Bus: primary=00, secondary=01, subordinate=01, sec-latency=0\n" - "> \302\240\302\240\302\240 I/O behind bridge: None\n" - "> \302\240\302\240\302\240 Memory behind bridge: 01100000-011fffff [size=1M]\n" - "> \302\240\302\240\302\240 Prefetchable memory behind bridge: None\n" - "> \302\240\302\240\302\240 [virtual] Expansion ROM at 01200000 [disabled] [size=64K]\n" - "> \302\240\302\240\302\240 Capabilities: [40] Power Management version 3\n" - "> \302\240\302\240\302\240 Capabilities: [50] MSI: Enable- Count=1/1 Maskable+ 64bit+\n" - "> \302\240\302\240\302\240 Capabilities: [70] Express Root Port (Slot-), MSI 00\n" - "> \302\240\302\240\302\240 Capabilities: [100] Advanced Error Reporting\n" - "> \302\240\302\240\302\240 Capabilities: [140] Virtual Channel\n" - "> \302\240\302\240\302\240 Kernel driver in use: pcieport\n" + "> ??? Flags: bus master, fast devsel, latency 0, IRQ 298\n" + "> ??? Memory at 01000000 (32-bit, non-prefetchable) [size=1M]\n" + "> ??? Bus: primary=00, secondary=01, subordinate=01, sec-latency=0\n" + "> ??? I/O behind bridge: None\n" + "> ??? Memory behind bridge: 01100000-011fffff [size=1M]\n" + "> ??? Prefetchable memory behind bridge: None\n" + "> ??? [virtual] Expansion ROM at 01200000 [disabled] [size=64K]\n" + "> ??? Capabilities: [40] Power Management version 3\n" + "> ??? Capabilities: [50] MSI: Enable- Count=1/1 Maskable+ 64bit+\n" + "> ??? Capabilities: [70] Express Root Port (Slot-), MSI 00\n" + "> ??? Capabilities: [100] Advanced Error Reporting\n" + "> ??? Capabilities: [140] Virtual Channel\n" + "> ??? Kernel driver in use: pcieport\n" "> lspci: Unable to load libkmod resources: error -12\n" "> \n" "> 01:00.0 PCI bridge: PLX Technology, Inc. PEX 8604 4-lane, 4-Port PCI\n" "> Express Gen 2 (5.0 GT/s) Switch (rev ba) (prog-if 00 [Normal\n" "> decode])\n" - "> \302\240\302\240\302\240 Flags: bus master, fast devsel, latency 0, IRQ 298\n" - "> \302\240\302\240\302\240 Memory at 01100000 (32-bit, non-prefetchable) [size=128K]\n" - "> \302\240\302\240\302\240 Bus: primary=01, secondary=02, subordinate=02, sec-latency=0\n" - "> \302\240\302\240\302\240 I/O behind bridge: None\n" - "> \302\240\302\240\302\240 Memory behind bridge: None\n" - "> \302\240\302\240\302\240 Prefetchable memory behind bridge: None\n" - "> \302\240\302\240\302\240 Capabilities: [40] Power Management version 3\n" - "> \302\240\302\240\302\240 Capabilities: [48] MSI: Enable- Count=1/4 Maskable+ 64bit+\n" - "> \302\240\302\240\302\240 Capabilities: [68] Express Upstream Port, MSI 00\n" - "> \302\240\302\240\302\240 Capabilities: [a4] Subsystem: PLX Technology, Inc. PEX 8604\n" + "> ??? Flags: bus master, fast devsel, latency 0, IRQ 298\n" + "> ??? Memory at 01100000 (32-bit, non-prefetchable) [size=128K]\n" + "> ??? Bus: primary=01, secondary=02, subordinate=02, sec-latency=0\n" + "> ??? I/O behind bridge: None\n" + "> ??? Memory behind bridge: None\n" + "> ??? Prefetchable memory behind bridge: None\n" + "> ??? Capabilities: [40] Power Management version 3\n" + "> ??? Capabilities: [48] MSI: Enable- Count=1/4 Maskable+ 64bit+\n" + "> ??? Capabilities: [68] Express Upstream Port, MSI 00\n" + "> ??? Capabilities: [a4] Subsystem: PLX Technology, Inc. PEX 8604\n" "> 4-lane, 4-Port PCI Express Gen 2 (5.0 GT/s) Switch\n" - "> \302\240\302\240\302\240 Capabilities: [100] Device Serial Number ba-86-01-10-b5-df-0e-00\n" - "> \302\240\302\240\302\240 Capabilities: [fb4] Advanced Error Reporting\n" - "> \302\240\302\240\302\240 Capabilities: [138] Power Budgeting <?>\n" - "> \302\240\302\240\302\240 Capabilities: [148] Virtual Channel\n" - "> \302\240\302\240\302\240 Capabilities: [448] Vendor Specific Information: ID=0000 Rev=0\n" + "> ??? Capabilities: [100] Device Serial Number ba-86-01-10-b5-df-0e-00\n" + "> ??? Capabilities: [fb4] Advanced Error Reporting\n" + "> ??? Capabilities: [138] Power Budgeting <?>\n" + "> ??? Capabilities: [148] Virtual Channel\n" + "> ??? Capabilities: [448] Vendor Specific Information: ID=0000 Rev=0\n" "> Len=0cc <?>\n" - "> \302\240\302\240\302\240 Capabilities: [950] Vendor Specific Information: ID=0001 Rev=0\n" + "> ??? Capabilities: [950] Vendor Specific Information: ID=0001 Rev=0\n" "> Len=010 <?>\n" - "> \302\240\302\240\302\240 Kernel driver in use: pcieport\n" + "> ??? Kernel driver in use: pcieport\n" > [ Node 4 | node-4 ] -17e06b4c86441a514f076a0b68f5949e29c50a2f83cbcdb57db8b04f174934e7 +94236b080a15ca41d8282d65fabff6461a745a57503e68a83a337a702a4af131
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.