diff for duplicates of <20180108103845.GE18649@localhost> diff --git a/a/1.txt b/N1/1.txt index 6e16ef9..f807c76 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -46,3 +46,6 @@ On Wed, Jan 03, 2018 at 12:12:08PM +0530, Kedareswara rao Appana wrote: Do you not support trf of 1byte, 2 bytes, or 4 bytes wide transfers? What is value of addr_width here typically? Usually controllers can support different widths and this is a surprise that you support only one value + +-- +~Vinod diff --git a/a/content_digest b/N1/content_digest index 1840170..06cde12 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,18 +1,9 @@ - "From\0Vinod Koul <vinod.koul@intel.com>\0" - "Subject\0[v2,1/4] dmaengine: xilinx_dma: populate dma caps properly\0" + "ref\01514961731-1916-1-git-send-email-appanad@xilinx.com\0" + "ref\01514961731-1916-2-git-send-email-appanad@xilinx.com\0" + "From\0vinod.koul@intel.com (Vinod Koul)\0" + "Subject\0[PATCH v2 1/4] dmaengine: xilinx_dma: populate dma caps properly\0" "Date\0Mon, 8 Jan 2018 16:08:45 +0530\0" - "To\0Kedareswara rao Appana <appana.durga.rao@xilinx.com>\0" - "Cc\0dan.j.williams@intel.com" - michal.simek@xilinx.com - appanad@xilinx.com - lars@metafoo.de - akinobu.mita@gmail.com - joabreu@synopsys.com - mike.looijmans@topic.nl - kedare06@gmail.com - dmaengine@vger.kernel.org - linux-arm-kernel@lists.infradead.org - " linux-kernel@vger.kernel.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On Wed, Jan 03, 2018 at 12:12:08PM +0530, Kedareswara rao Appana wrote:\n" @@ -62,6 +53,9 @@ "\n" "Do you not support trf of 1byte, 2 bytes, or 4 bytes wide transfers? What is\n" "value of addr_width here typically? Usually controllers can support\n" - different widths and this is a surprise that you support only one value + "different widths and this is a surprise that you support only one value\n" + "\n" + "-- \n" + ~Vinod -342e3e9272eceb6f3e81dd0a950a7c6892de51f867daddf46b407913ad34d817 +32488feb8800f3a859a8f7daecf582f68e8cb6fc86594f070bf77c92ae39230a
diff --git a/a/1.txt b/N2/1.txt index 6e16ef9..f807c76 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -46,3 +46,6 @@ On Wed, Jan 03, 2018 at 12:12:08PM +0530, Kedareswara rao Appana wrote: Do you not support trf of 1byte, 2 bytes, or 4 bytes wide transfers? What is value of addr_width here typically? Usually controllers can support different widths and this is a surprise that you support only one value + +-- +~Vinod diff --git a/a/content_digest b/N2/content_digest index 1840170..f922d00 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,5 +1,7 @@ + "ref\01514961731-1916-1-git-send-email-appanad@xilinx.com\0" + "ref\01514961731-1916-2-git-send-email-appanad@xilinx.com\0" "From\0Vinod Koul <vinod.koul@intel.com>\0" - "Subject\0[v2,1/4] dmaengine: xilinx_dma: populate dma caps properly\0" + "Subject\0Re: [PATCH v2 1/4] dmaengine: xilinx_dma: populate dma caps properly\0" "Date\0Mon, 8 Jan 2018 16:08:45 +0530\0" "To\0Kedareswara rao Appana <appana.durga.rao@xilinx.com>\0" "Cc\0dan.j.williams@intel.com" @@ -62,6 +64,9 @@ "\n" "Do you not support trf of 1byte, 2 bytes, or 4 bytes wide transfers? What is\n" "value of addr_width here typically? Usually controllers can support\n" - different widths and this is a surprise that you support only one value + "different widths and this is a surprise that you support only one value\n" + "\n" + "-- \n" + ~Vinod -342e3e9272eceb6f3e81dd0a950a7c6892de51f867daddf46b407913ad34d817 +a4bf1b131cff7c706b685ed6738fc9a7b9a176d0b67558dacf0ead392e23d4fe
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