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[2001:4830:134:3::11]) by mx.google.com with ESMTPS id i6si4119865ybl.53.2018.01.11.10.59.02 for (version=TLS1 cipher=AES128-SHA bits=128/128); Thu, 11 Jan 2018 10:59:02 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: from localhost ([::1]:34748 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eZi45-00067w-TO for alex.bennee@linaro.org; Thu, 11 Jan 2018 13:59:01 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33505) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eZi3z-00067O-86 for qemu-arm@nongnu.org; Thu, 11 Jan 2018 13:58:56 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eZi3w-0001wi-4t for qemu-arm@nongnu.org; Thu, 11 Jan 2018 13:58:55 -0500 Received: from mx1.redhat.com ([209.132.183.28]:53194) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eZi3v-0001v9-VA; Thu, 11 Jan 2018 13:58:52 -0500 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id C03CD8B104; Thu, 11 Jan 2018 18:58:45 +0000 (UTC) Received: from work-vm (ovpn-116-109.ams2.redhat.com [10.36.116.109]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 91DFC798C0; Thu, 11 Jan 2018 18:58:43 +0000 (UTC) Date: Thu, 11 Jan 2018 18:58:41 +0000 From: "Dr. David Alan Gilbert" To: Peter Maydell Message-ID: <20180111185840.GE13384@work-vm> References: <20171218173022.18418-1-richard.henderson@linaro.org> <20171218173022.18418-8-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.1 (2017-09-22) X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Thu, 11 Jan 2018 18:58:50 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: Re: [Qemu-arm] [PATCH 7/9] target/arm: Expand vector registers for SVE X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-arm , Richard Henderson , QEMU Developers Errors-To: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org Sender: "Qemu-arm" X-TUID: gouz0h12cVKK * Peter Maydell (peter.maydell@linaro.org) wrote: > On 18 December 2017 at 17:30, Richard Henderson > wrote: > > Change vfp.regs as a uint64_t to vfp.zregs as an ARMVectorReg. > > The previous patches have made the change in representation > > relatively painless. > > > > Add vfp.pregs as an ARMPredicateReg. Let FFR be P16 to make > > it easier to treat it as for any other predicate. > > > diff --git a/target/arm/machine.c b/target/arm/machine.c > > index a85c2430d3..39f3123b10 100644 > > --- a/target/arm/machine.c > > +++ b/target/arm/machine.c > > @@ -50,7 +50,42 @@ static const VMStateDescription vmstate_vfp = { > > .minimum_version_id = 3, > > .needed = vfp_needed, > > .fields = (VMStateField[]) { > > - VMSTATE_UINT64_ARRAY(env.vfp.regs, ARMCPU, 64), > > + /* For compatibility, store Qn out of Zn here. */ > > + /* TODO: store the other quadwords in another subsection, > > + along with predicate registers and ZCR_EL[1-3]. */ > > I think we should get the migration state stuff right at the point > where we change the data structure in cpu.h. > > > > + VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[0].d, ARMCPU, 0, 2), > > + VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[1].d, ARMCPU, 0, 2), > > + VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[2].d, ARMCPU, 0, 2), > > David: does the migration code guarantee that we can split an > old VMSTATE_UINT64_ARRAY into being a sequence of SUB_ARRAYs > like this and retain the same on-the-wire format (ie and > keep migration compat) ? There's no on-the-wire protocol for this - it's just the array elements, so as long as the total adds up the same and it's still uint64's it should work. Dave > I suspect we've used this clever trick before elsewhere, but thought > it better to check... > > thanks > -- PMM -- Dr. David Alan Gilbert / dgilbert@redhat.com / Manchester, UK From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33525) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eZi41-00067v-CQ for qemu-devel@nongnu.org; Thu, 11 Jan 2018 13:58:58 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eZi40-00020c-Ci for qemu-devel@nongnu.org; Thu, 11 Jan 2018 13:58:57 -0500 Date: Thu, 11 Jan 2018 18:58:41 +0000 From: "Dr. David Alan Gilbert" Message-ID: <20180111185840.GE13384@work-vm> References: <20171218173022.18418-1-richard.henderson@linaro.org> <20171218173022.18418-8-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Subject: Re: [Qemu-devel] [PATCH 7/9] target/arm: Expand vector registers for SVE List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: Richard Henderson , QEMU Developers , qemu-arm * Peter Maydell (peter.maydell@linaro.org) wrote: > On 18 December 2017 at 17:30, Richard Henderson > wrote: > > Change vfp.regs as a uint64_t to vfp.zregs as an ARMVectorReg. > > The previous patches have made the change in representation > > relatively painless. > > > > Add vfp.pregs as an ARMPredicateReg. Let FFR be P16 to make > > it easier to treat it as for any other predicate. > > > diff --git a/target/arm/machine.c b/target/arm/machine.c > > index a85c2430d3..39f3123b10 100644 > > --- a/target/arm/machine.c > > +++ b/target/arm/machine.c > > @@ -50,7 +50,42 @@ static const VMStateDescription vmstate_vfp = { > > .minimum_version_id = 3, > > .needed = vfp_needed, > > .fields = (VMStateField[]) { > > - VMSTATE_UINT64_ARRAY(env.vfp.regs, ARMCPU, 64), > > + /* For compatibility, store Qn out of Zn here. */ > > + /* TODO: store the other quadwords in another subsection, > > + along with predicate registers and ZCR_EL[1-3]. */ > > I think we should get the migration state stuff right at the point > where we change the data structure in cpu.h. > > > > + VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[0].d, ARMCPU, 0, 2), > > + VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[1].d, ARMCPU, 0, 2), > > + VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[2].d, ARMCPU, 0, 2), > > David: does the migration code guarantee that we can split an > old VMSTATE_UINT64_ARRAY into being a sequence of SUB_ARRAYs > like this and retain the same on-the-wire format (ie and > keep migration compat) ? There's no on-the-wire protocol for this - it's just the array elements, so as long as the total adds up the same and it's still uint64's it should work. Dave > I suspect we've used this clever trick before elsewhere, but thought > it better to check... > > thanks > -- PMM -- Dr. David Alan Gilbert / dgilbert@redhat.com / Manchester, UK