From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH] drm: add drm_format_alpha_bits Date: Fri, 12 Jan 2018 18:25:35 +0200 Message-ID: <20180112162535.GF10981@intel.com> References: <1515766876-14231-1-git-send-email-ayan.halder@arm.com> <20180112142834.GB10981@intel.com> <20180112154349.GE16548@arm.com> <20180112155333.GD10981@intel.com> <20180112161138.GA18191@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 107736E527 for ; Fri, 12 Jan 2018 16:25:41 +0000 (UTC) Content-Disposition: inline In-Reply-To: <20180112161138.GA18191@arm.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Ayan Halder Cc: airlied@linux.ie, liviu.dudau@arm.com, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, daniel.vetter@intel.com, maxime.ripard@free-electrons.com, nd@arm.com List-Id: dri-devel@lists.freedesktop.org T24gRnJpLCBKYW4gMTIsIDIwMTggYXQgMDQ6MTE6MzhQTSArMDAwMCwgQXlhbiBIYWxkZXIgd3Jv dGU6Cj4gT24gRnJpLCBKYW4gMTIsIDIwMTggYXQgMDU6NTM6MzNQTSArMDIwMCwgVmlsbGUgU3ly aj9sPyB3cm90ZToKPiA+IE9uIEZyaSwgSmFuIDEyLCAyMDE4IGF0IDAzOjQzOjQ5UE0gKzAwMDAs IEF5YW4gSGFsZGVyIHdyb3RlOgo+ID4gPiBPbiBGcmksIEphbiAxMiwgMjAxOCBhdCAwNDoyODoz NFBNICswMjAwLCBWaWxsZSBTeXJqP2w/IHdyb3RlOgo+ID4gPiA+IE9uIEZyaSwgSmFuIDEyLCAy MDE4IGF0IDAyOjIxOjE2UE0gKzAwMDAsIEF5YW4gSGFsZGVyIHdyb3RlOgo+ID4gPiA+ID4gZHJt X2Zvcm1hdF9pbmZvIGRvZXMgbm90IGRlc2NyaWJlIHRoZSBudW1iZXIgb2YgYml0cyB1c2VkIGZv ciB0aGUgYWxwaGEKPiA+ID4gPiA+IGNoYW5uZWwuIFRoYXQgaW5mb3JtYXRpb24gaXMgdXNlZnVs IGluIGEgY2VudHJhbCBwbGFjZSBsaWtlIGRybV9mb3VyY2MuYwo+ID4gPiA+ID4gd2hlcmUgaXQg Y2FuIGJlIHF1ZXJpZWQgYnkgdGhlIGRyaXZlcnMgdGhhdCB3YW50IHRvIGRldGVybWluZSBpZiAn YWxwaGEKPiA+ID4gPiA+IGJsZW5kaW5nJyBpcyB0byBiZSBlbmFibGVkIG9yIG5vdC4KPiA+ID4g PiA+IAo+ID4gPiA+ID4gU2lnbmVkLW9mZi1ieTogQXlhbiBLdW1hciBIYWxkZXIgPGF5YW4uaGFs ZGVyQGFybS5jb20+Cj4gPiA+ID4gPiBSZXZpZXdlZC1ieTogTGl2aXUgRHVkYXUgPGxpdml1LmR1 ZGF1QGFybS5jb20+Cj4gPiA+ID4gPiAtLS0KPiA+ID4gPiA+ICBkcml2ZXJzL2dwdS9kcm0vZHJt X2ZvdXJjYy5jIHwgMTU0ICsrKysrKysrKysrKysrKysrKysrKysrKy0tLS0tLS0tLS0tLS0tLS0t LS0KPiA+ID4gPiA+ICBpbmNsdWRlL2RybS9kcm1fZm91cmNjLmggICAgIHwgICAzICsKPiA+ID4g PiA+ICAyIGZpbGVzIGNoYW5nZWQsIDg5IGluc2VydGlvbnMoKyksIDY4IGRlbGV0aW9ucygtKQo+ ID4gPiA+ID4gCj4gPiA+ID4gPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL2RybV9mb3Vy Y2MuYyBiL2RyaXZlcnMvZ3B1L2RybS9kcm1fZm91cmNjLmMKPiA+ID4gPiA+IGluZGV4IDljMDE1 MmQuLjA3MzAwMWIgMTAwNjQ0Cj4gPiA+ID4gPiAtLS0gYS9kcml2ZXJzL2dwdS9kcm0vZHJtX2Zv dXJjYy5jCj4gPiA+ID4gPiArKysgYi9kcml2ZXJzL2dwdS9kcm0vZHJtX2ZvdXJjYy5jCj4gPiA+ ID4gPHNuaXA+Cj4gPiA+ID4gPiBAQCAtMzQ4LDMgKzM0OCwyMSBAQCBpbnQgZHJtX2Zvcm1hdF9w bGFuZV9oZWlnaHQoaW50IGhlaWdodCwgdWludDMyX3QgZm9ybWF0LCBpbnQgcGxhbmUpCj4gPiA+ ID4gPiAgCXJldHVybiBoZWlnaHQgLyBpbmZvLT52c3ViOwo+ID4gPiA+ID4gIH0KPiA+ID4gPiA+ ICBFWFBPUlRfU1lNQk9MKGRybV9mb3JtYXRfcGxhbmVfaGVpZ2h0KTsKPiA+ID4gPiA+ICsKPiA+ ID4gPiA+ICsvKioKPiA+ID4gPiA+ICsgKiBkcm1fZm9ybWF0X2FscGhhX2JpdHMgLSBnZXQgdGhl IG51bWJlciBvZiBiaXRzIHBlciBwaXhlbAo+ID4gPiA+ID4gKyAqIHJlcHJlc2VudGluZyBhbHBo YSBmb3IgZm9ybWF0Cj4gPiA+ID4gPiArICogQGZvcm1hdDogcGl4ZWwgZm9ybWF0IChEUk1fRk9S TUFUXyopCj4gPiA+ID4gPiArICoKPiA+ID4gPiA+ICsgKiBSZXR1cm5zOgo+ID4gPiA+ID4gKyAq IFRoZSBudW1iZXIgb2YgYml0cyBwZXIgcGl4ZWwgcmVwcmVzZW50aW5nIGFscGhhIHVzZWQgYnkg dGhlCj4gPiA+ID4gPiArICogc3BlY2lmaWVkIHBpeGVsIGZvcm1hdC4KPiA+ID4gPiA+ICsgKi8K PiA+ID4gPiA+ICtpbnQgZHJtX2Zvcm1hdF9hbHBoYV9iaXRzKHVpbnQzMl90IGZvcm1hdCkKPiA+ ID4gPiA+ICt7Cj4gPiA+ID4gPiArCWNvbnN0IHN0cnVjdCBkcm1fZm9ybWF0X2luZm8gKmluZm87 Cj4gPiA+ID4gPiArCj4gPiA+ID4gPiArCWluZm8gPSBkcm1fZm9ybWF0X2luZm8oZm9ybWF0KTsK PiA+ID4gPiA+ICsJcmV0dXJuIGluZm8gPyBpbmZvLT5hbHBoYSA6IDA7Cj4gPiA+ID4gPiArfQo+ ID4gPiA+ID4gK0VYUE9SVF9TWU1CT0woZHJtX2Zvcm1hdF9hbHBoYV9iaXRzKTsKPiA+ID4gPiAK PiA+ID4gPiBEbyB5b3UgaGF2ZSBhbiBhY3R1YWwgdXNlIGZvciB0aGlzIGZ1bmN0aW9uIHNvbWV3 aGVyZT8KPiA+ID4gQ3VycmVudGx5LCB3ZSBkbyBub3QgaGF2ZSBhIHVzYWdlIGZvciB0aGlzIGZ1 bmN0aW9uLgo+ID4gCj4gPiBObyBwb2ludCBpbiBhZGRpbmcgdGhlIGZ1bmN0aW9uIHRoZW4gSU1P Lgo+IFdlIGhhdmUgaGVscGVyIGZ1bmN0aW9ucyBmb3IgdGhlIG90aGVyIGZpZWxkcyBzbyBJIGZv bGxvd2VkIHRoZSBzYW1lCj4gYW5kIGFkZGVkIHRoZSBoZWxwZXIgZnVuY3Rpb24gZm9yIHRoZSBu ZXcgZmllbGQgKCdhbHBoYScpIHRvby4KClRob3NlIGhlbHBlcnMgYXJlIG1vc3RseSB0aGVyZSBm b3IgbGVnYWN5IHJlYXNvbnMuIElkZWFsbHkgc29tZW9uZSB3b3VsZApnbyBvdmVyIGFsbCB0aGUg Y29kZSBhbmQgY2xlYW4gdXAgdGhlIGNhc2VzIHdoZXJlIHVzaW5nIHRob3NlIGhlbHBlcnMKbWFr ZXMgbm8gc2Vuc2UgKGllLiB3aGVuIHlvdSBhbHJlYWR5IGhhdmUgdGhlIGZvcm1hdCBzdHJ1Y3R1 cmUgYXJvdW5kKQphbmQgdGhlbiByZW1vdmUgdGhlIGhlbHBlcnMgaWYvd2hlbiB0aGV5J3JlIG5v IGxvbmdlciBuZWVkZWQuIFRoaXMgc29ydApvZiBzdHVmZiB0ZW5kcyB0byBsaW5nZXIgYXJvdW5k IGZvciBhIHdoaWxlIGFmdGVyIGJpZ2dlciBtZWNoYW5pY2FsCmNvbnZlcnNpb25zIGxpa2UgdGhl IGFkZGl0aW9uIG9mIHRoZSBmb3JtYXQgaW5mbyBzdHJ1Y3R1cmUuCgo+ID4gCj4gPiA+IFdlIG5l ZWQgJ2FscGhhJwo+ID4gPiBmaWVsZCBmb3IgZWFjaCBlbnRyeSBpbiAnZHJtX2Zvcm1hdF9pbmZv JyBzbyBhcyB0byBkZXRlcm1pbmUgd2hldGhlcgo+ID4gPiB0byBlbmFibGUvZGlzYWJsZSBhbHBo YSBibGVuZGluZyBpbiBNYWxpIGRpc3BsYXkgcHJvY2Vzc29yIGZvciB0aGUKPiA+ID4gcGFydGlj dWxhciBjb2xvciBmb3JtYXQuIAo+ID4gCj4gPiBJIHRoaW5rIHRoYXQncyBPSy4gTm90IHN1cmUg aWYgaXQgcmVhbGx5IGhlbHBzIG11Y2ggdGhvdWdoIHNpbmNlIHlvdQo+ID4gZ2VuZXJhbGx5IGhh dmUgdG8gY29uZmlndXJlIG90aGVyIHRoaW5ncyBiYXNlZCBvbiB0aGUgZm9ybWF0IGFzIHdlbGws IHNvCj4gPiBJIHdvdWxkIGV4cGVjdCBhbG1vc3QgZXZlcnlvbmUgd2lsbCBlbmQgdXAgd2l0aCBz b21lIGtpbmQgb2YKPiA+IHN3aWN0aC90YWJsZSB0byBjb25maWd1cmUgdGhlIGhhcmR3YXJlIGJh c2VkIG9uIHRoZSBmb3JtYXQuIEJhc2VkIG9uIGEKPiA+IHF1aWNrIGxvb2sgdGhpcyBkb2Vzbid0 IHJlYWxseSBoZWxwIGk5MTUgYXQgbGVhc3QuCj4gCj4gTXkgdW5kZXJzdGFuZGluZyB3YXMgYmFz ZWQgb24gdGhlIGZhY3QgdGhhdCBhbHBoYSBibGVuZGluZyBjb3VsZCBiZSBhCj4gY29tbW9uIGZl YXR1cmUgZm9yIGFsbCB0aGUgZHJpdmVycyAoSSBtaWdodCBiZSB3cm9uZykuIFNvLCBpZiB3ZSBr ZWVwCj4gdGhlIG51bWJlciBvZiAnYWxwaGEnIGJpdHMgaW4gJ2RybV9mb3JtYXRfaW5mbycsIGl0 IHdvdWxkIGJlIHVzZWZ1bCB0bwo+IGZldGNoIHRoaXMgaW5mbyBzaW1pbGFyIHRvIHRoZSBleGlz dGluZyBmaWVsZHMuCgpJJ20ganVzdCBzYXlpbmcgdGhhdCB1dCBkb2Vzbid0IHJlYWxseSBwcm92 aWRlIG11Y2ggZXh0cmEgaGVscCBpZgp0aGUgZHJpdmVyIGFscmVhZHkgaGFzIGVnLiBhIHN3aXRj aCBzdGF0ZW1lbnQgZm9yIGFsbCB0aGUgZm9ybWF0cwphbnl3YXkuCgo+ID4gPiA+IAo+ID4gPiA+ ID4gZGlmZiAtLWdpdCBhL2luY2x1ZGUvZHJtL2RybV9mb3VyY2MuaCBiL2luY2x1ZGUvZHJtL2Ry bV9mb3VyY2MuaAo+ID4gPiA+ID4gaW5kZXggNjk0MmU4NC4uNTUxMzUxMCAxMDA2NDQKPiA+ID4g PiA+IC0tLSBhL2luY2x1ZGUvZHJtL2RybV9mb3VyY2MuaAo+ID4gPiA+ID4gKysrIGIvaW5jbHVk ZS9kcm0vZHJtX2ZvdXJjYy5oCj4gPiA+ID4gPiBAQCAtMzgsNiArMzgsNyBAQCBzdHJ1Y3QgZHJt X21vZGVfZmJfY21kMjsKPiA+ID4gPiA+ICAgKiBAY3BwOiBOdW1iZXIgb2YgYnl0ZXMgcGVyIHBp eGVsIChwZXIgcGxhbmUpCj4gPiA+ID4gPiAgICogQGhzdWI6IEhvcml6b250YWwgY2hyb21hIHN1 YnNhbXBsaW5nIGZhY3Rvcgo+ID4gPiA+ID4gICAqIEB2c3ViOiBWZXJ0aWNhbCBjaHJvbWEgc3Vi c2FtcGxpbmcgZmFjdG9yCj4gPiA+ID4gPiArICogQGFscGhhOiBOdW1iZXIgb2YgYml0cyBwZXIg cGl4ZWwgcmVwcmVzZW50aW5nIGFscGhhCj4gPiA+ID4gPiAgICovCj4gPiA+ID4gPiAgc3RydWN0 IGRybV9mb3JtYXRfaW5mbyB7Cj4gPiA+ID4gPiAgCXUzMiBmb3JtYXQ7Cj4gPiA+ID4gPiBAQCAt NDYsNiArNDcsNyBAQCBzdHJ1Y3QgZHJtX2Zvcm1hdF9pbmZvIHsKPiA+ID4gPiA+ICAJdTggY3Bw WzNdOwo+ID4gPiA+ID4gIAl1OCBoc3ViOwo+ID4gPiA+ID4gIAl1OCB2c3ViOwo+ID4gPiA+ID4g Kwl1OCBhbHBoYTsKPiA+ID4gPiA+ICB9Owo+ID4gPiA+ID4gIAo+ID4gPiA+ID4gIC8qKgo+ID4g PiA+ID4gQEAgLTU3LDYgKzU5LDcgQEAgc3RydWN0IGRybV9mb3JtYXRfbmFtZV9idWYgewo+ID4g PiA+ID4gIH07Cj4gPiA+ID4gPiAgCj4gPiA+ID4gPiAgY29uc3Qgc3RydWN0IGRybV9mb3JtYXRf aW5mbyAqX19kcm1fZm9ybWF0X2luZm8odTMyIGZvcm1hdCk7Cj4gPiA+ID4gPiAraW50IGRybV9m b3JtYXRfYWxwaGFfYml0cyh1MzIgZm9ybWF0KTsKPiA+ID4gPiA+ICBjb25zdCBzdHJ1Y3QgZHJt X2Zvcm1hdF9pbmZvICpkcm1fZm9ybWF0X2luZm8odTMyIGZvcm1hdCk7Cj4gPiA+ID4gPiAgY29u c3Qgc3RydWN0IGRybV9mb3JtYXRfaW5mbyAqCj4gPiA+ID4gPiAgZHJtX2dldF9mb3JtYXRfaW5m byhzdHJ1Y3QgZHJtX2RldmljZSAqZGV2LAo+ID4gPiA+ID4gLS0gCj4gPiA+ID4gPiAyLjcuNAo+ ID4gPiA+ID4gCj4gPiA+ID4gPiBfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fXwo+ID4gPiA+ID4gZHJpLWRldmVsIG1haWxpbmcgbGlzdAo+ID4gPiA+ID4gZHJp LWRldmVsQGxpc3RzLmZyZWVkZXNrdG9wLm9yZwo+ID4gPiA+ID4gaHR0cHM6Ly9saXN0cy5mcmVl ZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9kcmktZGV2ZWwKPiA+ID4gPiAKPiA+ID4gPiAt LSAKPiA+ID4gPiBWaWxsZSBTeXJqPz9sPz8KPiA+ID4gPiBJbnRlbCBPVEMKPiA+ID4gPiBfX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwo+ID4gPiA+IGRyaS1k ZXZlbCBtYWlsaW5nIGxpc3QKPiA+ID4gPiBkcmktZGV2ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3Jn Cj4gPiA+ID4gaHR0cHM6Ly9saXN0cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9k cmktZGV2ZWwKPiA+IAo+ID4gLS0gCj4gPiBWaWxsZSBTeXJqP2w/Cj4gPiBJbnRlbCBPVEMKCi0t IApWaWxsZSBTeXJqw6Rsw6QKSW50ZWwgT1RDCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fCmRyaS1kZXZlbCBtYWlsaW5nIGxpc3QKZHJpLWRldmVsQGxpc3Rz LmZyZWVkZXNrdG9wLm9yZwpodHRwczovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xp c3RpbmZvL2RyaS1kZXZlbAo= From mboxrd@z Thu Jan 1 00:00:00 1970 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934126AbeALQZm (ORCPT + 1 other); Fri, 12 Jan 2018 11:25:42 -0500 Received: from mga02.intel.com ([134.134.136.20]:64416 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934004AbeALQZl (ORCPT ); Fri, 12 Jan 2018 11:25:41 -0500 X-Amp-Result: UNSCANNABLE X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,349,1511856000"; d="scan'208";a="9681155" Date: Fri, 12 Jan 2018 18:25:35 +0200 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: Ayan Halder Cc: liviu.dudau@arm.com, brian.starkey@arm.com, daniel.vetter@intel.com, jani.nikula@linux.intel.com, seanpaul@chromium.org, airlied@linux.ie, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, maxime.ripard@free-electrons.com, nd@arm.com Subject: Re: [PATCH] drm: add drm_format_alpha_bits Message-ID: <20180112162535.GF10981@intel.com> References: <1515766876-14231-1-git-send-email-ayan.halder@arm.com> <20180112142834.GB10981@intel.com> <20180112154349.GE16548@arm.com> <20180112155333.GD10981@intel.com> <20180112161138.GA18191@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20180112161138.GA18191@arm.com> User-Agent: Mutt/1.7.2 (2016-11-26) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: On Fri, Jan 12, 2018 at 04:11:38PM +0000, Ayan Halder wrote: > On Fri, Jan 12, 2018 at 05:53:33PM +0200, Ville Syrj?l? wrote: > > On Fri, Jan 12, 2018 at 03:43:49PM +0000, Ayan Halder wrote: > > > On Fri, Jan 12, 2018 at 04:28:34PM +0200, Ville Syrj?l? wrote: > > > > On Fri, Jan 12, 2018 at 02:21:16PM +0000, Ayan Halder wrote: > > > > > drm_format_info does not describe the number of bits used for the alpha > > > > > channel. That information is useful in a central place like drm_fourcc.c > > > > > where it can be queried by the drivers that want to determine if 'alpha > > > > > blending' is to be enabled or not. > > > > > > > > > > Signed-off-by: Ayan Kumar Halder > > > > > Reviewed-by: Liviu Dudau > > > > > --- > > > > > drivers/gpu/drm/drm_fourcc.c | 154 ++++++++++++++++++++++++------------------- > > > > > include/drm/drm_fourcc.h | 3 + > > > > > 2 files changed, 89 insertions(+), 68 deletions(-) > > > > > > > > > > diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c > > > > > index 9c0152d..073001b 100644 > > > > > --- a/drivers/gpu/drm/drm_fourcc.c > > > > > +++ b/drivers/gpu/drm/drm_fourcc.c > > > > > > > > > @@ -348,3 +348,21 @@ int drm_format_plane_height(int height, uint32_t format, int plane) > > > > > return height / info->vsub; > > > > > } > > > > > EXPORT_SYMBOL(drm_format_plane_height); > > > > > + > > > > > +/** > > > > > + * drm_format_alpha_bits - get the number of bits per pixel > > > > > + * representing alpha for format > > > > > + * @format: pixel format (DRM_FORMAT_*) > > > > > + * > > > > > + * Returns: > > > > > + * The number of bits per pixel representing alpha used by the > > > > > + * specified pixel format. > > > > > + */ > > > > > +int drm_format_alpha_bits(uint32_t format) > > > > > +{ > > > > > + const struct drm_format_info *info; > > > > > + > > > > > + info = drm_format_info(format); > > > > > + return info ? info->alpha : 0; > > > > > +} > > > > > +EXPORT_SYMBOL(drm_format_alpha_bits); > > > > > > > > Do you have an actual use for this function somewhere? > > > Currently, we do not have a usage for this function. > > > > No point in adding the function then IMO. > We have helper functions for the other fields so I followed the same > and added the helper function for the new field ('alpha') too. Those helpers are mostly there for legacy reasons. Ideally someone would go over all the code and clean up the cases where using those helpers makes no sense (ie. when you already have the format structure around) and then remove the helpers if/when they're no longer needed. This sort of stuff tends to linger around for a while after bigger mechanical conversions like the addition of the format info structure. > > > > > We need 'alpha' > > > field for each entry in 'drm_format_info' so as to determine whether > > > to enable/disable alpha blending in Mali display processor for the > > > particular color format. > > > > I think that's OK. Not sure if it really helps much though since you > > generally have to configure other things based on the format as well, so > > I would expect almost everyone will end up with some kind of > > swicth/table to configure the hardware based on the format. Based on a > > quick look this doesn't really help i915 at least. > > My understanding was based on the fact that alpha blending could be a > common feature for all the drivers (I might be wrong). So, if we keep > the number of 'alpha' bits in 'drm_format_info', it would be useful to > fetch this info similar to the existing fields. I'm just saying that ut doesn't really provide much extra help if the driver already has eg. a switch statement for all the formats anyway. > > > > > > > > > diff --git a/include/drm/drm_fourcc.h b/include/drm/drm_fourcc.h > > > > > index 6942e84..5513510 100644 > > > > > --- a/include/drm/drm_fourcc.h > > > > > +++ b/include/drm/drm_fourcc.h > > > > > @@ -38,6 +38,7 @@ struct drm_mode_fb_cmd2; > > > > > * @cpp: Number of bytes per pixel (per plane) > > > > > * @hsub: Horizontal chroma subsampling factor > > > > > * @vsub: Vertical chroma subsampling factor > > > > > + * @alpha: Number of bits per pixel representing alpha > > > > > */ > > > > > struct drm_format_info { > > > > > u32 format; > > > > > @@ -46,6 +47,7 @@ struct drm_format_info { > > > > > u8 cpp[3]; > > > > > u8 hsub; > > > > > u8 vsub; > > > > > + u8 alpha; > > > > > }; > > > > > > > > > > /** > > > > > @@ -57,6 +59,7 @@ struct drm_format_name_buf { > > > > > }; > > > > > > > > > > const struct drm_format_info *__drm_format_info(u32 format); > > > > > +int drm_format_alpha_bits(u32 format); > > > > > const struct drm_format_info *drm_format_info(u32 format); > > > > > const struct drm_format_info * > > > > > drm_get_format_info(struct drm_device *dev, > > > > > -- > > > > > 2.7.4 > > > > > > > > > > _______________________________________________ > > > > > dri-devel mailing list > > > > > dri-devel@lists.freedesktop.org > > > > > https://lists.freedesktop.org/mailman/listinfo/dri-devel > > > > > > > > -- > > > > Ville Syrj??l?? > > > > Intel OTC > > > > _______________________________________________ > > > > dri-devel mailing list > > > > dri-devel@lists.freedesktop.org > > > > https://lists.freedesktop.org/mailman/listinfo/dri-devel > > > > -- > > Ville Syrj?l? > > Intel OTC -- Ville Syrjälä Intel OTC