From: keith.busch@intel.com (Keith Busch)
Subject: [PATCH] nvme-pci: take sglist coalescing in dma_map_sg into account
Date: Mon, 15 Jan 2018 18:50:16 -0700 [thread overview]
Message-ID: <20180116015016.GD32369@localhost.localdomain> (raw)
In-Reply-To: <20180115173716.22409-1-hch@lst.de>
On Mon, Jan 15, 2018@06:37:16PM +0100, Christoph Hellwig wrote:
> Some iommu implementations can merge physically and/or virtually
> contiguous segments inside sg_map_dma. The NVMe SGL support does not take
> this into account and will warn because of falling off a loop. Pass the
> number of mapped segments to nvme_pci_setup_sgls so that the SGL setup
> can take the number of mapped segments into account.
>
> Reported-by: Fangjian (Turing) <f.fangjian at huawei.com>
> Fixes: a7a7cbe3 ("nvme-pci: add SGL support")
> Signed-off-by: Christoph Hellwig <hch at lst.de>
This looks fine, but I think keeping tabs on on the mapped length wouldn't
hurt since a mismatch is a software bug that would be difficult to debug
later. But if you trust it's not necessary, that's good enough for me.
next prev parent reply other threads:[~2018-01-16 1:50 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-15 17:37 [PATCH] nvme-pci: take sglist coalescing in dma_map_sg into account Christoph Hellwig
2018-01-16 1:50 ` Keith Busch [this message]
2018-01-17 8:30 ` Sagi Grimberg
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