From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-lf0-f67.google.com ([209.85.215.67]:40860 "EHLO mail-lf0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755940AbeASSgB (ORCPT ); Fri, 19 Jan 2018 13:36:01 -0500 Received: by mail-lf0-f67.google.com with SMTP id h92so3197124lfi.7 for ; Fri, 19 Jan 2018 10:36:01 -0800 (PST) From: Sergei Shtylyov Message-Id: <20180119183557.226328412@cogentembedded.com> Date: Fri, 19 Jan 2018 21:29:21 +0300 To: Laurent Pinchart , David Airlie , dri-devel@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org To: Rob Herring Cc: Mark Rutland , Sergei Shtylyov To: devicetree@vger.kernel.org Subject: [PATCH 3/3] drm: rcar-du: lvds: add R8A77970 support MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-15 Content-Disposition: inline; filename=drm-rcar-du-lvds-add-R8A77970-support.patch Sender: linux-renesas-soc-owner@vger.kernel.org List-ID: Add support for the R-Car V3M (R8A77970) SoC to the LVDS encoder driver. Note that there are some differences with the other R-Car gen3 SoCs, e.g. LVDPLLCR has the same layout as in the R-Car gen2 SoCs... Signed-off-by: Sergei Shtylyov --- drivers/gpu/drm/rcar-du/rcar_lvds.c | 21 +++++++++++++++++++-- 1 file changed, 19 insertions(+), 2 deletions(-) Index: linux/drivers/gpu/drm/rcar-du/rcar_lvds.c =================================================================== --- linux.orig/drivers/gpu/drm/rcar-du/rcar_lvds.c +++ linux/drivers/gpu/drm/rcar-du/rcar_lvds.c @@ -32,6 +32,10 @@ enum rcar_lvds_mode { }; #define RCAR_LVDS_QUIRK_LANES (1 << 0) /* LVDS lanes 1 and 3 inverted */ +#define RCAR_LVDS_QUIRK_GEN2_PLLCR (1 << 1) /* LVDPLLCR has gen2-like */ + /* layout on R8A77970 */ +#define RCAR_LVDS_QUIRK_PHY (1 << 2) /* LVDS has PHY on R8A77970 */ + /* and R8A7799{0|5} */ struct rcar_lvds_device_info { unsigned int gen; @@ -162,6 +166,7 @@ static void rcar_lvds_enable(struct drm_ */ struct drm_crtc *crtc = lvds->bridge.encoder->crtc; const struct drm_display_mode *mode = &lvds->display_mode; + unsigned int quirks = lvds->info->quirks; unsigned int gen = lvds->info->gen; u32 lvdcr0 = lvds->mode << LVDCR0_LVMD_SHIFT; u32 lvdpllcr; @@ -186,7 +191,7 @@ static void rcar_lvds_enable(struct drm_ LVDCTRCR_CTR2SEL_DISP | LVDCTRCR_CTR1SEL_VSYNC | LVDCTRCR_CTR0SEL_HSYNC); - if (lvds->info->quirks & RCAR_LVDS_QUIRK_LANES) + if (quirks & RCAR_LVDS_QUIRK_LANES) lvdhcr = LVDCHCR_CHSEL_CH(0, 0) | LVDCHCR_CHSEL_CH(1, 3) | LVDCHCR_CHSEL_CH(2, 2) | LVDCHCR_CHSEL_CH(3, 1); else @@ -195,7 +200,7 @@ static void rcar_lvds_enable(struct drm_ rcar_lvds_write(lvds, LVDCHCR, lvdhcr); /* PLL clock configuration */ - if (gen < 3) + if (gen < 3 || quirks & RCAR_LVDS_QUIRK_GEN2_PLLCR) lvdpllcr = rcar_lvds_lvdpllcr_gen2(mode->clock); else lvdpllcr = rcar_lvds_lvdpllcr_gen3(mode->clock); @@ -227,6 +232,12 @@ static void rcar_lvds_enable(struct drm_ rcar_lvds_write(lvds, LVDCR0, lvdcr0); } + if (quirks & RCAR_LVDS_QUIRK_PHY) { + /* Turn on the LVDS PHY. */ + lvdcr0 |= LVDCR0_LVEN; + rcar_lvds_write(lvds, LVDCR0, lvdcr0); + } + /* Wait for the startup delay. */ usleep_range(100, 150); @@ -499,6 +510,11 @@ static const struct rcar_lvds_device_inf .gen = 3, }; +static const struct rcar_lvds_device_info rcar_lvds_r8a77970_info = { + .gen = 3, + .quirks = RCAR_LVDS_QUIRK_GEN2_PLLCR | RCAR_LVDS_QUIRK_PHY, +}; + static const struct of_device_id rcar_lvds_of_table[] = { { .compatible = "renesas,r8a7743-lvds", .data = &rcar_lvds_gen2_info }, { .compatible = "renesas,r8a7790-lvds", .data = &rcar_lvds_r8a7790_info }, @@ -506,6 +522,7 @@ static const struct of_device_id rcar_lv { .compatible = "renesas,r8a7793-lvds", .data = &rcar_lvds_gen2_info }, { .compatible = "renesas,r8a7795-lvds", .data = &rcar_lvds_gen3_info }, { .compatible = "renesas,r8a7796-lvds", .data = &rcar_lvds_gen3_info }, + { .compatible = "renesas,r8a77970-lvds", .data = &rcar_lvds_r8a77970_info }, { } }; From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sergei Shtylyov Subject: [PATCH 3/3] drm: rcar-du: lvds: add R8A77970 support Date: Fri, 19 Jan 2018 21:29:21 +0300 Message-ID: <20180119183557.226328412@cogentembedded.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Content-Disposition: inline; filename=drm-rcar-du-lvds-add-R8A77970-support.patch List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Laurent Pinchart , David Airlie , dri-devel@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org, Rob Herring , devicetree@vger.kernel.org Cc: Mark Rutland , Sergei Shtylyov List-Id: devicetree@vger.kernel.org QWRkIHN1cHBvcnQgZm9yIHRoZSBSLUNhciBWM00gKFI4QTc3OTcwKSBTb0MgdG8gdGhlIExWRFMg ZW5jb2RlciBkcml2ZXIuCk5vdGUgdGhhdCB0aGVyZSBhcmUgc29tZSBkaWZmZXJlbmNlcyB3aXRo IHRoZSBvdGhlciBSLUNhciBnZW4zIFNvQ3MsIGUuZy4KTFZEUExMQ1IgaGFzIHRoZSBzYW1lIGxh eW91dCBhcyBpbiB0aGUgUi1DYXIgZ2VuMiBTb0NzLi4uCgpTaWduZWQtb2ZmLWJ5OiBTZXJnZWkg U2h0eWx5b3YgPHNlcmdlaS5zaHR5bHlvdkBjb2dlbnRlbWJlZGRlZC5jb20+CgotLS0KIGRyaXZl cnMvZ3B1L2RybS9yY2FyLWR1L3JjYXJfbHZkcy5jIHwgICAyMSArKysrKysrKysrKysrKysrKysr LS0KIDEgZmlsZSBjaGFuZ2VkLCAxOSBpbnNlcnRpb25zKCspLCAyIGRlbGV0aW9ucygtKQoKSW5k ZXg6IGxpbnV4L2RyaXZlcnMvZ3B1L2RybS9yY2FyLWR1L3JjYXJfbHZkcy5jCj09PT09PT09PT09 PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT0K LS0tIGxpbnV4Lm9yaWcvZHJpdmVycy9ncHUvZHJtL3JjYXItZHUvcmNhcl9sdmRzLmMKKysrIGxp bnV4L2RyaXZlcnMvZ3B1L2RybS9yY2FyLWR1L3JjYXJfbHZkcy5jCkBAIC0zMiw2ICszMiwxMCBA QCBlbnVtIHJjYXJfbHZkc19tb2RlIHsKIH07CiAKICNkZWZpbmUgUkNBUl9MVkRTX1FVSVJLX0xB TkVTCSgxIDw8IDApCS8qIExWRFMgbGFuZXMgMSBhbmQgMyBpbnZlcnRlZCAqLworI2RlZmluZSBS Q0FSX0xWRFNfUVVJUktfR0VOMl9QTExDUiAoMSA8PCAxKQkvKiBMVkRQTExDUiBoYXMgZ2VuMi1s aWtlICovCisJCQkJCQkvKiBsYXlvdXQgb24gUjhBNzc5NzAgKi8KKyNkZWZpbmUgUkNBUl9MVkRT X1FVSVJLX1BIWQkoMSA8PCAyKQkvKiBMVkRTIGhhcyBQSFkgb24gUjhBNzc5NzAgKi8KKwkJCQkJ CS8qIGFuZCAgUjhBNzc5OXswfDV9ICovCiAKIHN0cnVjdCByY2FyX2x2ZHNfZGV2aWNlX2luZm8g ewogCXVuc2lnbmVkIGludCBnZW47CkBAIC0xNjIsNiArMTY2LDcgQEAgc3RhdGljIHZvaWQgcmNh cl9sdmRzX2VuYWJsZShzdHJ1Y3QgZHJtXwogCSAqLwogCXN0cnVjdCBkcm1fY3J0YyAqY3J0YyA9 IGx2ZHMtPmJyaWRnZS5lbmNvZGVyLT5jcnRjOwogCWNvbnN0IHN0cnVjdCBkcm1fZGlzcGxheV9t b2RlICptb2RlID0gJmx2ZHMtPmRpc3BsYXlfbW9kZTsKKwl1bnNpZ25lZCBpbnQgcXVpcmtzID0g bHZkcy0+aW5mby0+cXVpcmtzOwogCXVuc2lnbmVkIGludCBnZW4gPSBsdmRzLT5pbmZvLT5nZW47 CiAJdTMyIGx2ZGNyMCA9IGx2ZHMtPm1vZGUgPDwgTFZEQ1IwX0xWTURfU0hJRlQ7CiAJdTMyIGx2 ZHBsbGNyOwpAQCAtMTg2LDcgKzE5MSw3IEBAIHN0YXRpYyB2b2lkIHJjYXJfbHZkc19lbmFibGUo c3RydWN0IGRybV8KIAkJCUxWRENUUkNSX0NUUjJTRUxfRElTUCB8IExWRENUUkNSX0NUUjFTRUxf VlNZTkMgfAogCQkJTFZEQ1RSQ1JfQ1RSMFNFTF9IU1lOQyk7CiAKLQlpZiAobHZkcy0+aW5mby0+ cXVpcmtzICYgUkNBUl9MVkRTX1FVSVJLX0xBTkVTKQorCWlmIChxdWlya3MgJiBSQ0FSX0xWRFNf UVVJUktfTEFORVMpCiAJCWx2ZGhjciA9IExWRENIQ1JfQ0hTRUxfQ0goMCwgMCkgfCBMVkRDSENS X0NIU0VMX0NIKDEsIDMpCiAJCSAgICAgICB8IExWRENIQ1JfQ0hTRUxfQ0goMiwgMikgfCBMVkRD SENSX0NIU0VMX0NIKDMsIDEpOwogCWVsc2UKQEAgLTE5NSw3ICsyMDAsNyBAQCBzdGF0aWMgdm9p ZCByY2FyX2x2ZHNfZW5hYmxlKHN0cnVjdCBkcm1fCiAJcmNhcl9sdmRzX3dyaXRlKGx2ZHMsIExW RENIQ1IsIGx2ZGhjcik7CiAKIAkvKiBQTEwgY2xvY2sgY29uZmlndXJhdGlvbiAqLwotCWlmIChn ZW4gPCAzKQorCWlmIChnZW4gPCAzIHx8IHF1aXJrcyAmIFJDQVJfTFZEU19RVUlSS19HRU4yX1BM TENSKQogCQlsdmRwbGxjciA9IHJjYXJfbHZkc19sdmRwbGxjcl9nZW4yKG1vZGUtPmNsb2NrKTsK IAllbHNlCiAJCWx2ZHBsbGNyID0gcmNhcl9sdmRzX2x2ZHBsbGNyX2dlbjMobW9kZS0+Y2xvY2sp OwpAQCAtMjI3LDYgKzIzMiwxMiBAQCBzdGF0aWMgdm9pZCByY2FyX2x2ZHNfZW5hYmxlKHN0cnVj dCBkcm1fCiAJCXJjYXJfbHZkc193cml0ZShsdmRzLCBMVkRDUjAsIGx2ZGNyMCk7CiAJfQogCisJ aWYgKHF1aXJrcyAmIFJDQVJfTFZEU19RVUlSS19QSFkpIHsKKwkJLyogVHVybiBvbiB0aGUgTFZE UyBQSFkuICovCisJCWx2ZGNyMCB8PSBMVkRDUjBfTFZFTjsKKwkJcmNhcl9sdmRzX3dyaXRlKGx2 ZHMsIExWRENSMCwgbHZkY3IwKTsKKwl9CisKIAkvKiBXYWl0IGZvciB0aGUgc3RhcnR1cCBkZWxh eS4gKi8KIAl1c2xlZXBfcmFuZ2UoMTAwLCAxNTApOwogCkBAIC00OTksNiArNTEwLDExIEBAIHN0 YXRpYyBjb25zdCBzdHJ1Y3QgcmNhcl9sdmRzX2RldmljZV9pbmYKIAkuZ2VuID0gMywKIH07CiAK K3N0YXRpYyBjb25zdCBzdHJ1Y3QgcmNhcl9sdmRzX2RldmljZV9pbmZvIHJjYXJfbHZkc19yOGE3 Nzk3MF9pbmZvID0geworCS5nZW4gPSAzLAorCS5xdWlya3MgPSBSQ0FSX0xWRFNfUVVJUktfR0VO Ml9QTExDUiB8IFJDQVJfTFZEU19RVUlSS19QSFksCit9OworCiBzdGF0aWMgY29uc3Qgc3RydWN0 IG9mX2RldmljZV9pZCByY2FyX2x2ZHNfb2ZfdGFibGVbXSA9IHsKIAl7IC5jb21wYXRpYmxlID0g InJlbmVzYXMscjhhNzc0My1sdmRzIiwgLmRhdGEgPSAmcmNhcl9sdmRzX2dlbjJfaW5mbyB9LAog CXsgLmNvbXBhdGlibGUgPSAicmVuZXNhcyxyOGE3NzkwLWx2ZHMiLCAuZGF0YSA9ICZyY2FyX2x2 ZHNfcjhhNzc5MF9pbmZvIH0sCkBAIC01MDYsNiArNTIyLDcgQEAgc3RhdGljIGNvbnN0IHN0cnVj dCBvZl9kZXZpY2VfaWQgcmNhcl9sdgogCXsgLmNvbXBhdGlibGUgPSAicmVuZXNhcyxyOGE3Nzkz LWx2ZHMiLCAuZGF0YSA9ICZyY2FyX2x2ZHNfZ2VuMl9pbmZvIH0sCiAJeyAuY29tcGF0aWJsZSA9 ICJyZW5lc2FzLHI4YTc3OTUtbHZkcyIsIC5kYXRhID0gJnJjYXJfbHZkc19nZW4zX2luZm8gfSwK IAl7IC5jb21wYXRpYmxlID0gInJlbmVzYXMscjhhNzc5Ni1sdmRzIiwgLmRhdGEgPSAmcmNhcl9s dmRzX2dlbjNfaW5mbyB9LAorCXsgLmNvbXBhdGlibGUgPSAicmVuZXNhcyxyOGE3Nzk3MC1sdmRz IiwgLmRhdGEgPSAmcmNhcl9sdmRzX3I4YTc3OTcwX2luZm8gfSwKIAl7IH0KIH07CiAKCl9fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCmRyaS1kZXZlbCBtYWls aW5nIGxpc3QKZHJpLWRldmVsQGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwczovL2xpc3RzLmZy ZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2RyaS1kZXZlbAo=