From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756249AbeATO0l (ORCPT ); Sat, 20 Jan 2018 09:26:41 -0500 Received: from mail-wr0-f177.google.com ([209.85.128.177]:37154 "EHLO mail-wr0-f177.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751130AbeATO0b (ORCPT ); Sat, 20 Jan 2018 09:26:31 -0500 X-Google-Smtp-Source: AH8x226bpDakYMVb3FQX7ArHMSz7RK0mVxHtKFVde3bw7MbXgTT37mkJ45kHwwXSycXQ6WPaOVnUuQ== Date: Sat, 20 Jan 2018 15:26:27 +0100 From: Ingo Molnar To: Nadav Amit Cc: Dave Hansen , LKML , Andy Lutomirski , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , the arch/x86 maintainers , w@1wt.eu, Linus Torvalds Subject: Re: [RFC] x86: Avoid CR3 load on compatibility mode with PTI Message-ID: <20180120142627.jttjdsenwsedvle6@gmail.com> References: <20180114201306.3554-1-namit@vmware.com> <57a8fa6b-a1d1-d440-ce13-b1d06d265584@linux.intel.com> <3D823F02-89EF-48D9-913D-5E65391F6F9D@gmail.com> <20180116004128.us5uprkzrr5gf4li@gmail.com> <5D6CD440-B20F-4ABF-8B02-EE87205B661D@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <5D6CD440-B20F-4ABF-8B02-EE87205B661D@gmail.com> User-Agent: NeoMutt/20170609 (1.8.3) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * Nadav Amit wrote: > > So we are trading a 5-15% slowdown (PTI) for another 5-15% slowdown, plus we > > are losing the soft-SMEP feature on older CPUs that PTI enables, which is a > > pretty powerful mitigation technique. > > This soft-SMEP can be kept by keeping PTI if SMEP is unsupported. Although we > trade slowdowns, they are different ones, which allows the user to make his best > decision. Indeed, not allowing PTI to be disabled if SMEP is unavailable might be a solution. > > Yes, I suspect in some (maybe many) cases it would be a speedup, but I really > > don't like the underlying assumptions and tradeoffs here. (Not that I like any > > of this whole Meltdown debacle TBH.) > > To make sure that I understand correctly - the assumptions are that disabling > PTI on compatibility mode would: (1) Benefit some workloads; (2) Be useful, even > if we only consider CPUs with SMEP; and (3) Secure. > > Under these assumptions, the tradeoff is slightly greater code complexity for > considerably better performance of 32-bit code; in some common cases this makes > 32-bit code to perform significantly better than 64-bit code. > > Am I missing something? My main concern was initially security, but so far from > your aggregated feedback I did not see something concrete which cannot > relatively easily be addressed. Yes, I suppose. Thanks, Ingo