From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Lunn Subject: Re: [PATCHv4 1/5] net: dsa: Support internal phy on 'cpu' port Date: Mon, 22 Jan 2018 21:54:59 +0100 Message-ID: <20180122205459.GF2467@lunn.ch> References: <20180116101958.19711-1-sebastian.reichel@collabora.co.uk> <20180116101958.19711-2-sebastian.reichel@collabora.co.uk> <09a9c406-85c1-0f84-4032-db243f825ca2@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <09a9c406-85c1-0f84-4032-db243f825ca2-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Florian Fainelli Cc: Sebastian Reichel , Vivien Didelot , Shawn Guo , Sascha Hauer , Fabio Estevam , Ian Ray , Nandor Han , Rob Herring , "David S. Miller" , netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: devicetree@vger.kernel.org > Note: there is still technically a misreprentation of how the PHY is > "attached" to the network device. In your DTSes, you have to have the > CPU port have a "phy-handle" to the internal PHY, while technically it > should be the i210 which has a "phy-handle" property to that PHY, and > even better, if the e1000e/idb drivers were PHYLIB capable, they could > manage it directly. Hi Florian Err, i don't think i agree. But maybe i'm missunderstanding. We have two back-to-back PHYs. I would expect the i210 MAC to have a phy-handle pointing it its PHY. The CPU port would then point to the internal switch PHY. Or are you suggesting the i210 has two phy-handles, its own and the switches? Andrew -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751145AbeAVUzU (ORCPT ); Mon, 22 Jan 2018 15:55:20 -0500 Received: from vps0.lunn.ch ([185.16.172.187]:59218 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750909AbeAVUzS (ORCPT ); Mon, 22 Jan 2018 15:55:18 -0500 Date: Mon, 22 Jan 2018 21:54:59 +0100 From: Andrew Lunn To: Florian Fainelli Cc: Sebastian Reichel , Vivien Didelot , Shawn Guo , Sascha Hauer , Fabio Estevam , Ian Ray , Nandor Han , Rob Herring , "David S. Miller" , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCHv4 1/5] net: dsa: Support internal phy on 'cpu' port Message-ID: <20180122205459.GF2467@lunn.ch> References: <20180116101958.19711-1-sebastian.reichel@collabora.co.uk> <20180116101958.19711-2-sebastian.reichel@collabora.co.uk> <09a9c406-85c1-0f84-4032-db243f825ca2@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <09a9c406-85c1-0f84-4032-db243f825ca2@gmail.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > Note: there is still technically a misreprentation of how the PHY is > "attached" to the network device. In your DTSes, you have to have the > CPU port have a "phy-handle" to the internal PHY, while technically it > should be the i210 which has a "phy-handle" property to that PHY, and > even better, if the e1000e/idb drivers were PHYLIB capable, they could > manage it directly. Hi Florian Err, i don't think i agree. But maybe i'm missunderstanding. We have two back-to-back PHYs. I would expect the i210 MAC to have a phy-handle pointing it its PHY. The CPU port would then point to the internal switch PHY. Or are you suggesting the i210 has two phy-handles, its own and the switches? Andrew