From mboxrd@z Thu Jan 1 00:00:00 1970 From: Peter Zijlstra Subject: Re: [RFC 05/10] x86/speculation: Add basic IBRS support infrastructure Date: Wed, 24 Jan 2018 13:29:08 +0100 Message-ID: <20180124122908.GI2249@hirez.programming.kicks-ass.net> References: <1516476182-5153-1-git-send-email-karahmed@amazon.de> <1516476182-5153-6-git-send-email-karahmed@amazon.de> <1516741116.13558.11.camel@infradead.org> <20180124084735.GM2228@hirez.programming.kicks-ass.net> <1516796091.13558.116.camel@infradead.org> Mime-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: 8bit Cc: Thomas Gleixner , KarimAllah Ahmed , linux-kernel@vger.kernel.org, Andi Kleen , Andrea Arcangeli , Andy Lutomirski , Arjan van de Ven , Ashok Raj , Asit Mallick , Borislav Petkov , Dan Williams , Dave Hansen , Greg Kroah-Hartman , "H . Peter Anvin" , Ingo Molnar , Janakarajan Natarajan , Joerg Roedel , Jun Nakajima , Laura Abbott , Linus Torvalds Return-path: Content-Disposition: inline In-Reply-To: <1516796091.13558.116.camel@infradead.org> Sender: linux-kernel-owner@vger.kernel.org List-Id: kvm.vger.kernel.org On Wed, Jan 24, 2018 at 12:14:51PM +0000, David Woodhouse wrote: > On Wed, 2018-01-24 at 09:47 +0100, Peter Zijlstra wrote: > > > > Typically tglx likes to use x86_match_cpu() for these things; see also > > commit: bd9240a18edfb ("x86/apic: Add TSC_DEADLINE quirk due to > > errata"). > > Ewww. > > static u32 hsx_deadline_rev(void) > { >        switch (boot_cpu_data.x86_mask) { >        case 0x02: return 0x3a; /* EP */ >        case 0x04: return 0x0f; /* EX */ >        } > >        return ~0U; > } > ... > static const struct x86_cpu_id deadline_match[] = { >        DEADLINE_MODEL_MATCH_FUNC( INTEL_FAM6_HASWELL_X,        hsx_deadline_rev), >        DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_BROADWELL_X,      0x0b000020), >        DEADLINE_MODEL_MATCH_FUNC( INTEL_FAM6_BROADWELL_XEON_D, bdx_deadline_rev), >        DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_SKYLAKE_X,        0x02000014), > ... > >        /* >         * Function pointers will have the MSB set due to address layout, >         * immediate revisions will not. >         */ >        if ((long)m->driver_data < 0) >                rev = ((u32 (*)(void))(m->driver_data))(); >        else >                rev = (u32)m->driver_data; > > EWWWW! > Yes :/ We could look at extending x86_cpu_id and x86_match_cpu with a stepping option I suppose, but that might be lots of churn. Thomas? From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Google-Smtp-Source: AH8x224+r0F3sXCEb2LFlJoRJE3w5/lAD0+tWnqdsEhg+IbCFfdSR0HSurzbD3IN0QO+BR8daJ8O ARC-Seal: i=1; a=rsa-sha256; t=1516796958; cv=none; d=google.com; s=arc-20160816; b=ENTLOcjLcwNzbsIruw+8vEGSc/dH/HZpCxwA8LphtmSWjKXNAOCAXvfZOufcdnQeOw xPNV+N3aPEDD3WJjDKJaxGufOFlztXGaXH0izVJ0EoZZcYeYJAeaw5Ey0sYyoUds94Si 7fMHWDOVhuaI7IaesOyKcCszi2LrSKwTRMswIIYufEz8GPVQcwqW9rSoJE+lGy0AMYxD QAE7VItiRx4hj6jbSfPKzUasvybbKRtQDYLpvlDt/LIFOOxSIcOaMpRRiK2xgtOCgoEh mtgMlAnAW/NNGfTwAEePos2enObVp6IoZ/b1jhIkgojY8FGCZ3WgyVD5Yod5GDCVnp2F ScUQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=user-agent:in-reply-to:content-transfer-encoding :content-disposition:mime-version:references:message-id:subject:cc :to:from:date:dkim-signature:arc-authentication-results; bh=9TSrCmNSiFGuSuZBNArEYP2xm79aLeNNux2kO9GkAaw=; b=Q9HbqnTGhOXS8s0eZhOWmRwyJHt4WGGNgnlIWXlpFUKnU5CPqu+/nmD/bvaaG992uH G37sVy0XHxEi77yk/RyIb7weHmjeJCZMHOhVUprDJkfyTvPupXF9rKWO61AwGtIovRP2 m1hpTOaW8UV4+aD73Nyt+5k0NPFl0H8vRhacxbl2RtgbJggmrbPAilmk9xksscu6kn9z bFY06SN+PyXZGS8sJUs1YJfeIvh9y/jn9Zywn7L3rH+GwRZY9/DBsNw4mOAR+tCkxS05 LUPea484kBPZvs3FnVr2h04bDF3DyIDNr8/ETg5Ej6vuoQW1NXLpxHqihsmLmfK5PuWi AhKQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@infradead.org header.s=bombadil.20170209 header.b=B1t/hTKT; spf=pass (google.com: best guess record for domain of peterz@infradead.org designates 65.50.211.133 as permitted sender) smtp.mailfrom=peterz@infradead.org Authentication-Results: mx.google.com; dkim=pass header.i=@infradead.org header.s=bombadil.20170209 header.b=B1t/hTKT; spf=pass (google.com: best guess record for domain of peterz@infradead.org designates 65.50.211.133 as permitted sender) smtp.mailfrom=peterz@infradead.org Date: Wed, 24 Jan 2018 13:29:08 +0100 From: Peter Zijlstra To: David Woodhouse Cc: Thomas Gleixner , KarimAllah Ahmed , linux-kernel@vger.kernel.org, Andi Kleen , Andrea Arcangeli , Andy Lutomirski , Arjan van de Ven , Ashok Raj , Asit Mallick , Borislav Petkov , Dan Williams , Dave Hansen , Greg Kroah-Hartman , "H . Peter Anvin" , Ingo Molnar , Janakarajan Natarajan , Joerg Roedel , Jun Nakajima , Laura Abbott , Linus Torvalds , Masami Hiramatsu , Paolo Bonzini , Radim =?utf-8?B?S3LEjW3DocWZ?= , Tim Chen , Tom Lendacky , kvm@vger.kernel.org, x86@kernel.org Subject: Re: [RFC 05/10] x86/speculation: Add basic IBRS support infrastructure Message-ID: <20180124122908.GI2249@hirez.programming.kicks-ass.net> References: <1516476182-5153-1-git-send-email-karahmed@amazon.de> <1516476182-5153-6-git-send-email-karahmed@amazon.de> <1516741116.13558.11.camel@infradead.org> <20180124084735.GM2228@hirez.programming.kicks-ass.net> <1516796091.13558.116.camel@infradead.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1516796091.13558.116.camel@infradead.org> User-Agent: Mutt/1.9.2 (2017-12-15) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: =?utf-8?q?1590140581449802182?= X-GMAIL-MSGID: =?utf-8?q?1590476887283283747?= X-Mailing-List: linux-kernel@vger.kernel.org List-ID: On Wed, Jan 24, 2018 at 12:14:51PM +0000, David Woodhouse wrote: > On Wed, 2018-01-24 at 09:47 +0100, Peter Zijlstra wrote: > > > > Typically tglx likes to use x86_match_cpu() for these things; see also > > commit: bd9240a18edfb ("x86/apic: Add TSC_DEADLINE quirk due to > > errata"). > > Ewww. > > static u32 hsx_deadline_rev(void) > { >        switch (boot_cpu_data.x86_mask) { >        case 0x02: return 0x3a; /* EP */ >        case 0x04: return 0x0f; /* EX */ >        } > >        return ~0U; > } > ... > static const struct x86_cpu_id deadline_match[] = { >        DEADLINE_MODEL_MATCH_FUNC( INTEL_FAM6_HASWELL_X,        hsx_deadline_rev), >        DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_BROADWELL_X,      0x0b000020), >        DEADLINE_MODEL_MATCH_FUNC( INTEL_FAM6_BROADWELL_XEON_D, bdx_deadline_rev), >        DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_SKYLAKE_X,        0x02000014), > ... > >        /* >         * Function pointers will have the MSB set due to address layout, >         * immediate revisions will not. >         */ >        if ((long)m->driver_data < 0) >                rev = ((u32 (*)(void))(m->driver_data))(); >        else >                rev = (u32)m->driver_data; > > EWWWW! > Yes :/ We could look at extending x86_cpu_id and x86_match_cpu with a stepping option I suppose, but that might be lots of churn. Thomas?