From mboxrd@z Thu Jan 1 00:00:00 1970 Date: Wed, 24 Jan 2018 18:26:45 +0100 From: Greg KH To: David Woodhouse Cc: arjan@linux.intel.com, tglx@linutronix.de, karahmed@amazon.de, x86@kernel.org, linux-kernel@vger.kernel.org, tim.c.chen@linux.intel.com, bp@alien8.de, peterz@infradead.org, pbonzini@redhat.com, ak@linux.intel.com, torvalds@linux-foundation.org, dave.hansen@intel.com, gnomes@lxorguk.ukuu.org.uk Subject: Re: [PATCH v3 5/6] x86/pti: Do not enable PTI on processors which are not vulnerable to Meltdown Message-ID: <20180124172645.GF16646@kroah.com> References: <1516813025-10794-1-git-send-email-dwmw@amazon.co.uk> <1516813025-10794-6-git-send-email-dwmw@amazon.co.uk> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1516813025-10794-6-git-send-email-dwmw@amazon.co.uk> User-Agent: Mutt/1.9.2 (2017-12-15) X-Mailing-List: linux-kernel@vger.kernel.org List-ID: On Wed, Jan 24, 2018 at 04:57:04PM +0000, David Woodhouse wrote: > Some old Atoms, anything in family 5 or 4, and newer CPUs when they advertise > the IA32_ARCH_CAPABILITIES MSR and it has the RDCL_NO bit set, are not vulnerable. > > Roll the AMD exemption into the x86_match_cpu() table too. > > Based on suggestions from Dave Hansen and Alan Cox. > > Signed-off-by: David Woodhouse Reviewed-by: Greg Kroah-Hartman