From mboxrd@z Thu Jan 1 00:00:00 1970 From: Bjorn Andersson Subject: Re: [PATCH] pinctrl: msm: allow the gpio base to be configurable Date: Sun, 28 Jan 2018 16:51:30 -0800 Message-ID: <20180129005129.GB12728@builder> References: <1516915209-28295-1-git-send-email-timur@codeaurora.org> <20180128232310.GA12728@builder> <042b6cea-38f7-a660-0059-5f24fc7db9eb@codeaurora.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Received: from mail-pg0-f68.google.com ([74.125.83.68]:32869 "EHLO mail-pg0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751965AbeA2Avd (ORCPT ); Sun, 28 Jan 2018 19:51:33 -0500 Received: by mail-pg0-f68.google.com with SMTP id u1so3129303pgr.0 for ; Sun, 28 Jan 2018 16:51:33 -0800 (PST) Content-Disposition: inline In-Reply-To: <042b6cea-38f7-a660-0059-5f24fc7db9eb@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org List-Id: linux-arm-msm@vger.kernel.org To: Timur Tabi Cc: linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, Stephen Boyd , Linus Walleij On Sun 28 Jan 15:29 PST 2018, Timur Tabi wrote: > On 1/28/18 5:23 PM, Bjorn Andersson wrote: > > What platform has multiple TLMMs? > > > > [..] > > An upcoming one. > Cool :) > > > diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c > > > index b7b6849625ec..4dc76e15bd14 100644 > > > --- a/drivers/pinctrl/qcom/pinctrl-msm.c > > > +++ b/drivers/pinctrl/qcom/pinctrl-msm.c > > > @@ -901,7 +901,7 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl) > > > return -EINVAL; > > > chip = &pctrl->chip; > > > - chip->base = 0; > > > My bad, this should have been -1. > > Perhaps, but it's been 0 for a very long time, so I don't want to break any > existing platforms by suddenly relocating all GPIOs across all Qualcomm > platforms. > Yeah, I see that I got this wrong when I wrote the driver 4 years ago... There should be no in-kernel users depending on these numbers being hard coded, so anyone depending on these numbers starting at 0 would be user space - doing so incorrectly. > What do you think about my other idea? > With static numbering of gpios you end up having cross-instance and cross-driver tweaks to make things fit the number space. In particular when you combine different gpio chips in different ways for different devices this becomes a mess. That's why the idea of static gpio numbering was abandoned a long long time ago. So while it does solve an immediate problem for you it is proven not to be the right solution in the long run... Regards, Bjorn From mboxrd@z Thu Jan 1 00:00:00 1970 From: bjorn.andersson@linaro.org (Bjorn Andersson) Date: Sun, 28 Jan 2018 16:51:30 -0800 Subject: [PATCH] pinctrl: msm: allow the gpio base to be configurable In-Reply-To: <042b6cea-38f7-a660-0059-5f24fc7db9eb@codeaurora.org> References: <1516915209-28295-1-git-send-email-timur@codeaurora.org> <20180128232310.GA12728@builder> <042b6cea-38f7-a660-0059-5f24fc7db9eb@codeaurora.org> Message-ID: <20180129005129.GB12728@builder> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Sun 28 Jan 15:29 PST 2018, Timur Tabi wrote: > On 1/28/18 5:23 PM, Bjorn Andersson wrote: > > What platform has multiple TLMMs? > > > > [..] > > An upcoming one. > Cool :) > > > diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c > > > index b7b6849625ec..4dc76e15bd14 100644 > > > --- a/drivers/pinctrl/qcom/pinctrl-msm.c > > > +++ b/drivers/pinctrl/qcom/pinctrl-msm.c > > > @@ -901,7 +901,7 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl) > > > return -EINVAL; > > > chip = &pctrl->chip; > > > - chip->base = 0; > > > My bad, this should have been -1. > > Perhaps, but it's been 0 for a very long time, so I don't want to break any > existing platforms by suddenly relocating all GPIOs across all Qualcomm > platforms. > Yeah, I see that I got this wrong when I wrote the driver 4 years ago... There should be no in-kernel users depending on these numbers being hard coded, so anyone depending on these numbers starting at 0 would be user space - doing so incorrectly. > What do you think about my other idea? > With static numbering of gpios you end up having cross-instance and cross-driver tweaks to make things fit the number space. In particular when you combine different gpio chips in different ways for different devices this becomes a mess. That's why the idea of static gpio numbering was abandoned a long long time ago. So while it does solve an immediate problem for you it is proven not to be the right solution in the long run... Regards, Bjorn