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From: Segher Boessenkool <segher@kernel.crashing.org>
To: Nicholas Piggin <npiggin@gmail.com>
Cc: skiboot@lists.ozlabs.org, linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH (skiboot)] dt: add /cpus/ibm, powerpc-cpu-features device tree bindings
Date: Mon, 5 Feb 2018 08:41:18 -0600	[thread overview]
Message-ID: <20180205144116.GU21977@gate.crashing.org> (raw)
In-Reply-To: <20180205112615.4f267659@roar.ozlabs.ibm.com>

On Mon, Feb 05, 2018 at 11:26:15AM +1000, Nicholas Piggin wrote:
> On Sat, 3 Feb 2018 09:36:20 -0600
> > On Sat, Feb 03, 2018 at 02:27:32PM +1000, Nicholas Piggin wrote:
> > > +	/*
> > > +	 * ISAv3.0B branch instruction and register additions
> > > +	 * CA32, OV32, mcrxrx, setb
> > > +	 */
> > > +	{ "branch-v3",  
> > 
> > Those aren't branch instructions, they are integer instructions.  Some
> > of which use the XER, some of which use CR fields.
> 
> Okay, well the register changes are for branch facility registers, I
> guess instructions could move to integer. We have nothing relying on
> exact definition of these things at the moment, so these we can change.

XER is a fixed-point facility register (that's what the "X" means even!)

Thanks,


Segher

      reply	other threads:[~2018-02-05 14:41 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-03  4:27 [PATCH (skiboot)] dt: add /cpus/ibm, powerpc-cpu-features device tree bindings Nicholas Piggin
2018-02-03  4:31 ` [PATCH (skiboot)] dt: add /cpus/ibm,powerpc-cpu-features " Nicholas Piggin
2018-02-03 15:36 ` [PATCH (skiboot)] dt: add /cpus/ibm, powerpc-cpu-features " Segher Boessenkool
2018-02-05  1:26   ` Nicholas Piggin
2018-02-05 14:41     ` Segher Boessenkool [this message]

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