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[2001:4830:134:3::11]) by mx.google.com with ESMTPS id c7si84704ybf.22.2018.02.08.09.47.27 for (version=TLS1 cipher=AES128-SHA bits=128/128); Thu, 08 Feb 2018 09:47:27 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: from localhost ([::1]:57285 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ejqIA-0000Xm-Ue for alex.bennee@linaro.org; Thu, 08 Feb 2018 12:47:26 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55571) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ejq5p-0005m0-Kz for qemu-arm@nongnu.org; Thu, 08 Feb 2018 12:34:42 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ejq5m-0003Zx-BD for qemu-arm@nongnu.org; Thu, 08 Feb 2018 12:34:41 -0500 Received: from mx3-rdu2.redhat.com ([66.187.233.73]:46218 helo=mx1.redhat.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ejq5m-0003Xd-14; Thu, 08 Feb 2018 12:34:38 -0500 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.rdu2.redhat.com [10.11.54.3]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id B68DF4022909; Thu, 8 Feb 2018 17:34:26 +0000 (UTC) Received: from redhat.com (ovpn-120-144.rdu2.redhat.com [10.10.120.144]) by smtp.corp.redhat.com (Postfix) with ESMTP id 348471008385; Thu, 8 Feb 2018 17:34:20 +0000 (UTC) Date: Thu, 8 Feb 2018 19:34:20 +0200 From: "Michael S. Tsirkin" To: Peter Maydell Message-ID: <20180208193033-mutt-send-email-mst@kernel.org> References: <20180207042438.15422-1-andrew.smirnov@gmail.com> <20180207042438.15422-10-andrew.smirnov@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline In-Reply-To: X-Scanned-By: MIMEDefang 2.78 on 10.11.54.3 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.6]); Thu, 08 Feb 2018 17:34:26 +0000 (UTC) X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.6]); Thu, 08 Feb 2018 17:34:26 +0000 (UTC) for IP:'10.11.54.3' DOMAIN:'int-mx03.intmail.prod.int.rdu2.redhat.com' HELO:'smtp.corp.redhat.com' FROM:'mst@redhat.com' RCPT:'' Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 66.187.233.73 Subject: Re: [Qemu-arm] [PATCH v5 09/14] pci: Use pci_config_size in pci_data_* accessors X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrey Smirnov , Jason Wang , Marcel Apfelbaum , Philippe =?iso-8859-1?Q?Mathieu-Daud=E9?= , QEMU Developers , qemu-arm , Andrey Yurovsky Errors-To: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org Sender: "Qemu-arm" X-TUID: TUUmNV6wd/7j On Thu, Feb 08, 2018 at 05:20:53PM +0000, Peter Maydell wrote: > On 7 February 2018 at 04:24, Andrey Smirnov = wrote: > > Use pci_config_size (as opposed to PCI_CONFIG_SPACE_SIZE) in > > pci_data_read() and pci_data_write(), so this function would work for > > both classic PCI and PCIe use-cases. > > > > Cc: Peter Maydell > > Cc: Jason Wang > > Cc: Philippe Mathieu-Daud=E9 > > Cc: Marcel Apfelbaum > > Cc: Michael S. Tsirkin > > Cc: qemu-devel@nongnu.org > > Cc: qemu-arm@nongnu.org > > Cc: yurovsky@gmail.com > > Signed-off-by: Andrey Smirnov > > --- > > hw/pci/pci_host.c | 13 +++++++++---- > > 1 file changed, 9 insertions(+), 4 deletions(-) > > > > diff --git a/hw/pci/pci_host.c b/hw/pci/pci_host.c > > index 5eaa935cb5..ea52ea07cd 100644 > > --- a/hw/pci/pci_host.c > > +++ b/hw/pci/pci_host.c > > @@ -89,30 +89,35 @@ uint32_t pci_host_config_read_common(PCIDevice *p= ci_dev, uint32_t addr, > > void pci_data_write(PCIBus *s, uint32_t addr, uint32_t val, int len) > > { > > PCIDevice *pci_dev =3D pci_dev_find_by_addr(s, addr); > > - uint32_t config_addr =3D addr & (PCI_CONFIG_SPACE_SIZE - 1); > > + uint32_t config_addr; > > > > if (!pci_dev) { > > return; > > } > > > > + config_addr =3D addr & (pci_config_size(pci_dev) - 1); > > + > > PCI_DPRINTF("%s: %s: addr=3D%02" PRIx32 " val=3D%08" PRIx32 " le= n=3D%d\n", > > __func__, pci_dev->name, config_addr, val, len); > > - pci_host_config_write_common(pci_dev, config_addr, PCI_CONFIG_SP= ACE_SIZE, > > + pci_host_config_write_common(pci_dev, config_addr, > > + pci_config_size(pci_dev), > > val, len); > > } > > > > uint32_t pci_data_read(PCIBus *s, uint32_t addr, int len) > > { > > PCIDevice *pci_dev =3D pci_dev_find_by_addr(s, addr); > > - uint32_t config_addr =3D addr & (PCI_CONFIG_SPACE_SIZE - 1); > > + uint32_t config_addr; > > uint32_t val; > > > > if (!pci_dev) { > > return ~0x0; > > } > > > > + config_addr =3D addr & (pci_config_size(pci_dev) - 1); > > + > > val =3D pci_host_config_read_common(pci_dev, config_addr, > > - PCI_CONFIG_SPACE_SIZE, len); > > + pci_config_size(pci_dev), len)= ; > > PCI_DPRINTF("%s: %s: addr=3D%02"PRIx32" val=3D%08"PRIx32" len=3D= %d\n", > > __func__, pci_dev->name, config_addr, val, len); > > >=20 > I've just discovered that this breaks the e1000e-test: >=20 > $ (cd build/clang; QTEST_QEMU_BINARY=3Dx86_64-softmmu/qemu-system-x86_6= 4 > ./tests/e1000e-test) > /x86_64/e1000e/init: ** > ERROR:/home/petmay01/linaro/qemu-from-laptop/qemu/tests/e1000e-test.c:1= 18:e1000e_device_find: > 'e1000e_dev' should not be NULL >=20 > Any idea what's going on here? >=20 > thanks > -- PMM I'm yet to review these patches, but IIRC pci_data_read and friends aren't designed with pcie in mind - they implement the classic pci config space. I'd like to see more justification about how these are now going to be used. --=20 MST From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55586) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ejq5s-0005o4-2s for qemu-devel@nongnu.org; Thu, 08 Feb 2018 12:34:45 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ejq5q-0003g2-Tl for qemu-devel@nongnu.org; Thu, 08 Feb 2018 12:34:44 -0500 Date: Thu, 8 Feb 2018 19:34:20 +0200 From: "Michael S. Tsirkin" Message-ID: <20180208193033-mutt-send-email-mst@kernel.org> References: <20180207042438.15422-1-andrew.smirnov@gmail.com> <20180207042438.15422-10-andrew.smirnov@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH v5 09/14] pci: Use pci_config_size in pci_data_* accessors List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: Andrey Smirnov , qemu-arm , Jason Wang , Philippe =?iso-8859-1?Q?Mathieu-Daud=E9?= , Marcel Apfelbaum , QEMU Developers , Andrey Yurovsky On Thu, Feb 08, 2018 at 05:20:53PM +0000, Peter Maydell wrote: > On 7 February 2018 at 04:24, Andrey Smirnov = wrote: > > Use pci_config_size (as opposed to PCI_CONFIG_SPACE_SIZE) in > > pci_data_read() and pci_data_write(), so this function would work for > > both classic PCI and PCIe use-cases. > > > > Cc: Peter Maydell > > Cc: Jason Wang > > Cc: Philippe Mathieu-Daud=E9 > > Cc: Marcel Apfelbaum > > Cc: Michael S. Tsirkin > > Cc: qemu-devel@nongnu.org > > Cc: qemu-arm@nongnu.org > > Cc: yurovsky@gmail.com > > Signed-off-by: Andrey Smirnov > > --- > > hw/pci/pci_host.c | 13 +++++++++---- > > 1 file changed, 9 insertions(+), 4 deletions(-) > > > > diff --git a/hw/pci/pci_host.c b/hw/pci/pci_host.c > > index 5eaa935cb5..ea52ea07cd 100644 > > --- a/hw/pci/pci_host.c > > +++ b/hw/pci/pci_host.c > > @@ -89,30 +89,35 @@ uint32_t pci_host_config_read_common(PCIDevice *p= ci_dev, uint32_t addr, > > void pci_data_write(PCIBus *s, uint32_t addr, uint32_t val, int len) > > { > > PCIDevice *pci_dev =3D pci_dev_find_by_addr(s, addr); > > - uint32_t config_addr =3D addr & (PCI_CONFIG_SPACE_SIZE - 1); > > + uint32_t config_addr; > > > > if (!pci_dev) { > > return; > > } > > > > + config_addr =3D addr & (pci_config_size(pci_dev) - 1); > > + > > PCI_DPRINTF("%s: %s: addr=3D%02" PRIx32 " val=3D%08" PRIx32 " le= n=3D%d\n", > > __func__, pci_dev->name, config_addr, val, len); > > - pci_host_config_write_common(pci_dev, config_addr, PCI_CONFIG_SP= ACE_SIZE, > > + pci_host_config_write_common(pci_dev, config_addr, > > + pci_config_size(pci_dev), > > val, len); > > } > > > > uint32_t pci_data_read(PCIBus *s, uint32_t addr, int len) > > { > > PCIDevice *pci_dev =3D pci_dev_find_by_addr(s, addr); > > - uint32_t config_addr =3D addr & (PCI_CONFIG_SPACE_SIZE - 1); > > + uint32_t config_addr; > > uint32_t val; > > > > if (!pci_dev) { > > return ~0x0; > > } > > > > + config_addr =3D addr & (pci_config_size(pci_dev) - 1); > > + > > val =3D pci_host_config_read_common(pci_dev, config_addr, > > - PCI_CONFIG_SPACE_SIZE, len); > > + pci_config_size(pci_dev), len)= ; > > PCI_DPRINTF("%s: %s: addr=3D%02"PRIx32" val=3D%08"PRIx32" len=3D= %d\n", > > __func__, pci_dev->name, config_addr, val, len); > > >=20 > I've just discovered that this breaks the e1000e-test: >=20 > $ (cd build/clang; QTEST_QEMU_BINARY=3Dx86_64-softmmu/qemu-system-x86_6= 4 > ./tests/e1000e-test) > /x86_64/e1000e/init: ** > ERROR:/home/petmay01/linaro/qemu-from-laptop/qemu/tests/e1000e-test.c:1= 18:e1000e_device_find: > 'e1000e_dev' should not be NULL >=20 > Any idea what's going on here? >=20 > thanks > -- PMM I'm yet to review these patches, but IIRC pci_data_read and friends aren't designed with pcie in mind - they implement the classic pci config space. I'd like to see more justification about how these are now going to be used. --=20 MST