From mboxrd@z Thu Jan 1 00:00:00 1970 From: Richard Cochran Subject: Re: [RFC PATCH 04/10] net: dsa: mv88e6xxx: expose switch time as a PTP hardware clock Date: Fri, 9 Feb 2018 12:33:36 -0800 Message-ID: <20180209203336.fqkuliaqmonl67jg@localhost> References: <1517694016-6692-1-git-send-email-andrew@lunn.ch> <1517694016-6692-5-git-send-email-andrew@lunn.ch> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: netdev , Florian Fainelli , Vivien Didelot , sean.wang@mediatek.com, Woojung.Huh@microchip.com, john@phrozen.org, jbe@pengutronix.de, Brandon Streiff To: Andrew Lunn Return-path: Received: from mail-pg0-f67.google.com ([74.125.83.67]:41342 "EHLO mail-pg0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752618AbeBIUdj (ORCPT ); Fri, 9 Feb 2018 15:33:39 -0500 Received: by mail-pg0-f67.google.com with SMTP id t4so3303558pgp.8 for ; Fri, 09 Feb 2018 12:33:39 -0800 (PST) Content-Disposition: inline In-Reply-To: <1517694016-6692-5-git-send-email-andrew@lunn.ch> Sender: netdev-owner@vger.kernel.org List-ID: On Sat, Feb 03, 2018 at 10:40:08PM +0100, Andrew Lunn wrote: > +static int mv88e6xxx_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) > +{ > + struct mv88e6xxx_chip *chip = ptp_to_chip(ptp); > + int neg_adj = 0; > + u32 diff, mult; > + u64 adj; > + > + if (scaled_ppm < 0) { > + neg_adj = 1; > + scaled_ppm = -scaled_ppm; > + } > + mult = CC_MULT; > + adj = scaled_ppm * CC_MULT_NUM; ^^^^^^^^^^^^^^^^^^^^^^^^ This easily overflows on 32 bit platforms. My bad. Fix below... > + diff = div_u64(adj, CC_MULT_DEM); > + > + mutex_lock(&chip->reg_lock); > + > + timecounter_read(&chip->tstamp_tc); > + chip->tstamp_cc.mult = neg_adj ? mult - diff : mult + diff; > + > + mutex_unlock(&chip->reg_lock); > + > + return 0; > +} Thanks, Richard --- diff --git a/drivers/net/dsa/mv88e6xxx/ptp.c b/drivers/net/dsa/mv88e6xxx/ptp.c index 92f318743bd4..bd85e2c390e1 100644 --- a/drivers/net/dsa/mv88e6xxx/ptp.c +++ b/drivers/net/dsa/mv88e6xxx/ptp.c @@ -177,7 +177,8 @@ static int mv88e6xxx_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) scaled_ppm = -scaled_ppm; } mult = CC_MULT; - adj = scaled_ppm * CC_MULT_NUM; + adj = CC_MULT_NUM; + adj *= scaled_ppm; diff = div_u64(adj, CC_MULT_DEM); mutex_lock(&chip->reg_lock);