diff for duplicates of <20180213034431.GB10936@hao-dev> diff --git a/a/1.txt b/N1/1.txt index 2858099..782286f 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,6 +1,6 @@ On Mon, Feb 12, 2018 at 10:51:44AM -0600, Alan Tull wrote: -> On Mon, Nov 27, 2017 at 12:42 AM, Wu Hao <hao.wu-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> wrote: -> > From: Kang Luwei <luwei.kang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> +> On Mon, Nov 27, 2017 at 12:42 AM, Wu Hao <hao.wu@intel.com> wrote: +> > From: Kang Luwei <luwei.kang@intel.com> > > > > The header register set is always present for FPGA Management Engine (FME), > > this patch implements init and uinit function for header sub feature and @@ -50,13 +50,13 @@ Hao > Alan > > > -> > Signed-off-by: Tim Whisonant <tim.whisonant-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> -> > Signed-off-by: Enno Luebbers <enno.luebbers-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> -> > Signed-off-by: Shiva Rao <shiva.rao-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> -> > Signed-off-by: Christopher Rauer <christopher.rauer-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> -> > Signed-off-by: Kang Luwei <luwei.kang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> -> > Signed-off-by: Xiao Guangrong <guangrong.xiao-VuQAYsv1563Yd54FQh9/CA@public.gmane.org> -> > Signed-off-by: Wu Hao <hao.wu-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> +> > Signed-off-by: Tim Whisonant <tim.whisonant@intel.com> +> > Signed-off-by: Enno Luebbers <enno.luebbers@intel.com> +> > Signed-off-by: Shiva Rao <shiva.rao@intel.com> +> > Signed-off-by: Christopher Rauer <christopher.rauer@intel.com> +> > Signed-off-by: Kang Luwei <luwei.kang@intel.com> +> > Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com> +> > Signed-off-by: Wu Hao <hao.wu@intel.com> > > ---- > > v2: add sysfs documentation > > v3: rename driver to fpga-dfl-fme. @@ -77,7 +77,7 @@ Hao > > +What: /sys/bus/platform/devices/fpga-dfl-fme.0/ports_num > > +Date: November 2017 > > +KernelVersion: 4.15 -> > +Contact: Wu Hao <hao.wu-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> +> > +Contact: Wu Hao <hao.wu@intel.com> > > +Description: Read-only. One DFL FPGA device may have more than 1 > > + port/Accelerator Function Unit (AFU). It returns the > > + number of ports on the FPGA device when read it. @@ -85,14 +85,14 @@ Hao > > +What: /sys/bus/platform/devices/fpga-dfl-fme.0/bitstream_id > > +Date: November 2017 > > +KernelVersion: 4.15 -> > +Contact: Wu Hao <hao.wu-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> +> > +Contact: Wu Hao <hao.wu@intel.com> > > +Description: Read-only. It returns Blue Bitstream (static FPGA region) > > + identifier number. > > + > > +What: /sys/bus/platform/devices/fpga-dfl-fme.0/bitstream_meta > > +Date: November 2017 > > +KernelVersion: 4.15 -> > +Contact: Wu Hao <hao.wu-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> +> > +Contact: Wu Hao <hao.wu@intel.com> > > +Description: Read-only. It returns Blue Bitstream (static FPGA region) > > + meta data. > > diff --git a/drivers/fpga/dfl-fme-main.c b/drivers/fpga/dfl-fme-main.c diff --git a/a/content_digest b/N1/content_digest index b221bec..61a789f 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,29 +1,28 @@ "ref\01511764948-20972-1-git-send-email-hao.wu@intel.com\0" "ref\01511764948-20972-12-git-send-email-hao.wu@intel.com\0" "ref\0CANk1AXR2Q4M4c1TOQhR2J_Mz5MjwZWbR0JUXCR5jFVL_kZtcag@mail.gmail.com\0" - "ref\0CANk1AXR2Q4M4c1TOQhR2J_Mz5MjwZWbR0JUXCR5jFVL_kZtcag-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org\0" - "From\0Wu Hao <hao.wu-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>\0" + "From\0Wu Hao <hao.wu@intel.com>\0" "Subject\0Re: [PATCH v3 11/21] fpga: dfl: fme: add header sub feature support\0" "Date\0Tue, 13 Feb 2018 11:44:31 +0800\0" - "To\0Alan Tull <atull-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>\0" - "Cc\0Moritz Fischer <mdf-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>" - linux-fpga-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - linux-kernel <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - linux-api-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + "To\0Alan Tull <atull@kernel.org>\0" + "Cc\0Moritz Fischer <mdf@kernel.org>" + linux-fpga@vger.kernel.org + linux-kernel <linux-kernel@vger.kernel.org> + linux-api@vger.kernel.org Kang - Luwei <luwei.kang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> + Luwei <luwei.kang@intel.com> Zhang - Yi Z <yi.z.zhang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> - Tim Whisonant <tim.whisonant-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> - Enno Luebbers <enno.luebbers-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> - Shiva Rao <shiva.rao-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> - Christopher Rauer <christopher.rauer-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> - " Xiao Guangrong <guangrong.xiao-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>\0" + Yi Z <yi.z.zhang@intel.com> + Tim Whisonant <tim.whisonant@intel.com> + Enno Luebbers <enno.luebbers@intel.com> + Shiva Rao <shiva.rao@intel.com> + Christopher Rauer <christopher.rauer@intel.com> + " Xiao Guangrong <guangrong.xiao@linux.intel.com>\0" "\00:1\0" "b\0" "On Mon, Feb 12, 2018 at 10:51:44AM -0600, Alan Tull wrote:\n" - "> On Mon, Nov 27, 2017 at 12:42 AM, Wu Hao <hao.wu-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> wrote:\n" - "> > From: Kang Luwei <luwei.kang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>\n" + "> On Mon, Nov 27, 2017 at 12:42 AM, Wu Hao <hao.wu@intel.com> wrote:\n" + "> > From: Kang Luwei <luwei.kang@intel.com>\n" "> >\n" "> > The header register set is always present for FPGA Management Engine (FME),\n" "> > this patch implements init and uinit function for header sub feature and\n" @@ -73,13 +72,13 @@ "> Alan\n" "> \n" "> >\n" - "> > Signed-off-by: Tim Whisonant <tim.whisonant-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>\n" - "> > Signed-off-by: Enno Luebbers <enno.luebbers-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>\n" - "> > Signed-off-by: Shiva Rao <shiva.rao-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>\n" - "> > Signed-off-by: Christopher Rauer <christopher.rauer-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>\n" - "> > Signed-off-by: Kang Luwei <luwei.kang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>\n" - "> > Signed-off-by: Xiao Guangrong <guangrong.xiao-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>\n" - "> > Signed-off-by: Wu Hao <hao.wu-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>\n" + "> > Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>\n" + "> > Signed-off-by: Enno Luebbers <enno.luebbers@intel.com>\n" + "> > Signed-off-by: Shiva Rao <shiva.rao@intel.com>\n" + "> > Signed-off-by: Christopher Rauer <christopher.rauer@intel.com>\n" + "> > Signed-off-by: Kang Luwei <luwei.kang@intel.com>\n" + "> > Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com>\n" + "> > Signed-off-by: Wu Hao <hao.wu@intel.com>\n" "> > ----\n" "> > v2: add sysfs documentation\n" "> > v3: rename driver to fpga-dfl-fme.\n" @@ -100,7 +99,7 @@ "> > +What: /sys/bus/platform/devices/fpga-dfl-fme.0/ports_num\n" "> > +Date: November 2017\n" "> > +KernelVersion: 4.15\n" - "> > +Contact: Wu Hao <hao.wu-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>\n" + "> > +Contact: Wu Hao <hao.wu@intel.com>\n" "> > +Description: Read-only. One DFL FPGA device may have more than 1\n" "> > + port/Accelerator Function Unit (AFU). It returns the\n" "> > + number of ports on the FPGA device when read it.\n" @@ -108,14 +107,14 @@ "> > +What: /sys/bus/platform/devices/fpga-dfl-fme.0/bitstream_id\n" "> > +Date: November 2017\n" "> > +KernelVersion: 4.15\n" - "> > +Contact: Wu Hao <hao.wu-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>\n" + "> > +Contact: Wu Hao <hao.wu@intel.com>\n" "> > +Description: Read-only. It returns Blue Bitstream (static FPGA region)\n" "> > + identifier number.\n" "> > +\n" "> > +What: /sys/bus/platform/devices/fpga-dfl-fme.0/bitstream_meta\n" "> > +Date: November 2017\n" "> > +KernelVersion: 4.15\n" - "> > +Contact: Wu Hao <hao.wu-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>\n" + "> > +Contact: Wu Hao <hao.wu@intel.com>\n" "> > +Description: Read-only. It returns Blue Bitstream (static FPGA region)\n" "> > + meta data.\n" "> > diff --git a/drivers/fpga/dfl-fme-main.c b/drivers/fpga/dfl-fme-main.c\n" @@ -203,4 +202,4 @@ "> > 1.8.3.1\n" > > -9bdfa5d93cd728cb5153199500bee6fb83f27ffd670362eff1697337f90ac556 +30456dec75412bfebc8342379d7db5f4d4ad91aad72bfd34a46def44d07f2a92
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.