From mboxrd@z Thu Jan  1 00:00:00 1970
From: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Subject: Re: [PATCH 09/10] event/octeontx: add timer adapter SW
 traversal routine
Date: Sat, 17 Feb 2018 10:31:41 +0530
Message-ID: <20180217050140.GC2941@jerin>
References: <20180216213700.3415-1-pbhagavatula@caviumnetworks.com>
 <20180216213700.3415-10-pbhagavatula@caviumnetworks.com>
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To: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
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-----Original Message-----
> Date: Sat, 17 Feb 2018 03:06:59 +0530
> From: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
> To: jerin.jacob@caviumnetworks.com, santosh.shukla@caviumnetworks.com,
>  erik.g.carrillo@intel.com
> Cc: dev@dpdk.org, Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH 09/10] event/octeontx: add timer adapter SW
>  traversal routine
> X-Mailer: git-send-email 2.16.1
> 
> Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
> ---
>  config/common_base                    |   1 +
>  drivers/event/octeontx/timvf_worker.h | 105 ++++++++++++++++++++++++++++++++++
>  2 files changed, 106 insertions(+)
> 
> diff --git a/config/common_base b/config/common_base
> index 00010de92..2f8c21871 100644
> --- a/config/common_base
> +++ b/config/common_base
> @@ -563,6 +563,7 @@ CONFIG_RTE_LIBRTE_PMD_SW_EVENTDEV=y
>  #
>  CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF=y
>  CONFIG_RTE_PMD_OCTEONTX_TIMVF_USE_FPAVF=n
> +CONFIG_RTE_PMD_OCTEONTX_EVENT_TIMER_SW_TRAVERSAL=n

Please update the driver details in doc/guides/eventdevs/octeontx.rst
and the description of the config option in git commit as well the
documentation.

>  
>  #
>  # Compile PMD for OPDL event device
> diff --git a/drivers/event/octeontx/timvf_worker.h b/drivers/event/octeontx/timvf_worker.h
> index c3f37372a..1d5e27631 100644
> --- a/drivers/event/octeontx/timvf_worker.h
> +++ b/drivers/event/octeontx/timvf_worker.h
> @@ -7,6 +7,23 @@
>  
>  #include "timvf_evdev.h"
>  
> +#ifdef RTE_PMD_OCTEONTX_EVENT_TIMER_SW_TRAVERSAL
> +#if defined(RTE_ARCH_ARM64)
> +#define timvf_store_pair(val0, val1, addr) ({		\
> +			asm volatile(			\
> +			"stp %x[x0], %x[x1], [%x[p1]]"	\
> +			::[x0]"r"(val0), [x1]"r"(val1), [p1]"r"(addr) \
> +			); })
> +#else
> +#define timvf_store_pair(val0, val1, addr)		\
> +do {							\
> +	rte_write64(val0, addr);			\
> +	rte_write64(val1, (((uint8_t *)addr) + 8));	\
> +} while (0)
> +#endif
> +#endif

How about
#define timvf_store_pair ssovf_store_pair


> +