From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: "intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>,
"Pandiyan, Dhinakaran" <dhinakaran.pandiyan@intel.com>
Subject: Re: [PATCH v3] drm/i915/psr: Update PSR2 resolution check for Cannonlake
Date: Tue, 6 Mar 2018 14:36:36 -0800 [thread overview]
Message-ID: <20180306223636.GH15113@intel.com> (raw)
In-Reply-To: <20180306212415.GL5453@intel.com>
On Tue, Mar 06, 2018 at 11:24:15PM +0200, Ville Syrjälä wrote:
> On Tue, Mar 06, 2018 at 08:45:44PM +0000, Pandiyan, Dhinakaran wrote:
> >
> >
> >
> > On Tue, 2018-03-06 at 22:38 +0200, Ville Syrjälä wrote:
> > > On Tue, Mar 06, 2018 at 12:33:55PM -0800, Dhinakaran Pandiyan wrote:
> > > > In fact, apply the Cannonlake resolution check for all >= Gen-10 platforms
> > > > to be safe.
> > > >
> > > > v3: Update GLK too. (Ville)
> > > > Longer variable names.
> > > > if-else in place of ternary operator.
> > > > v2: Use local variables for resolution limits and print them (Ville)
> > > >
> > > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > > Cc: Elio Martinez Monroy <elio.martinez.monroy@intel.com>
> > > > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > > > ---
> > > > drivers/gpu/drm/i915/intel_psr.c | 21 +++++++++++++++------
> > > > 1 file changed, 15 insertions(+), 6 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
> > > > index 05770790a4e9..23175c5c4a50 100644
> > > > --- a/drivers/gpu/drm/i915/intel_psr.c
> > > > +++ b/drivers/gpu/drm/i915/intel_psr.c
> > > > @@ -451,8 +451,9 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
> > > > {
> > > > struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> > > > struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
> > > > - const struct drm_display_mode *adjusted_mode =
> > > > - &crtc_state->base.adjusted_mode;
> > > > + int crtc_hdisplay = crtc_state->base.adjusted_mode.crtc_hdisplay;
> > > > + int crtc_vdisplay = crtc_state->base.adjusted_mode.crtc_vdisplay;
> > > ^^^^^
> > > The crtc_ prefix is pretty much redundant.
> >
> > display_mode has members named vdisplay and hdisplay and this avoids any
> > potential confusion.
> >
> >
> > >
> > > > + int psr_max_h = 0, psr_max_v = 0;
> > >
> > > And this still reads as "max height" to my brain, but meh.
> >
> > And here I thought this version leaves no room for confusion :) I should
> > just ask someone else to write this patch.
> >
> > >
> > > >
> > > > /*
> > > > * FIXME psr2_support is messed up. It's both computed
> > > > @@ -462,10 +463,18 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
> > > > if (!dev_priv->psr.psr2_support)
> > > > return false;
> > > >
> > > > - /* PSR2 is restricted to work with panel resolutions up to 3640x2304 */
> > > > - if (adjusted_mode->crtc_hdisplay > 3640 ||
> > > > - adjusted_mode->crtc_vdisplay > 2304) {
> > > > - DRM_DEBUG_KMS("PSR2 not enabled, panel resolution too big\n");
> > > > + if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) {
> > > > + psr_max_h = 4096;
> > > > + psr_max_v = 2304;
> > > > + } else if (IS_GEN9(dev_priv)) {
> > > > + psr_max_h = 3640;
> > > > + psr_max_v = 2304;
> > > > + }
> > >
> > > pre-SKL?
> >
> > No PSR2 on pre-skl
>
> OK. I'd drop the IS_GEN9 then. Would be less confusing for my brain at
> least.
>
> >
> > If we do somehow end up here, returning false and printing a debug
> > message will be useful.
>
> Seems a bit overly protective. The has_psr2 check is just above. IMO
> adding basically dead code "just in case" is not helpful in making the
> code easy to read.
>
> Since you say pre-skl is not a problem here:
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
pushed, thanks
> >
> > >
> > > > +
> > > > + if (crtc_hdisplay > psr_max_h || crtc_vdisplay > psr_max_v) {
> > > > + DRM_DEBUG_KMS("PSR2 not enabled, resolution %dx%d > max supported %dx%d\n",
> > > > + crtc_hdisplay, crtc_vdisplay,
> > > > + psr_max_h, psr_max_v);
> > > > return false;
> > > > }
> > > >
> > > > --
> > > > 2.14.1
> > >
>
> --
> Ville Syrjälä
> Intel OTC
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next prev parent reply other threads:[~2018-03-06 22:36 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-06 20:33 [PATCH v3] drm/i915/psr: Update PSR2 resolution check for Cannonlake Dhinakaran Pandiyan
2018-03-06 20:38 ` Ville Syrjälä
2018-03-06 20:45 ` Pandiyan, Dhinakaran
2018-03-06 21:24 ` Ville Syrjälä
2018-03-06 21:36 ` Pandiyan, Dhinakaran
2018-03-06 22:36 ` Rodrigo Vivi [this message]
2018-03-06 21:19 ` ✓ Fi.CI.BAT: success for drm/i915/psr: Update PSR2 resolution check for Cannonlake (rev3) Patchwork
2018-03-07 1:17 ` ✓ Fi.CI.IGT: " Patchwork
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