diff for duplicates of <20180308164654.GA31199@botnar.kaiser.cx> diff --git a/a/1.txt b/N1/1.txt index 4bb3007..e6f950b 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -2,14 +2,14 @@ Hi Fabio, thanks for the quick response. -Thus wrote Fabio Estevam (festevam@gmail.com): +Thus wrote Fabio Estevam (festevam at gmail.com): > Hi Martin, > On Thu, Mar 8, 2018 at 11:08 AM, Martin Kaiser <martin@kaiser.cx> wrote: > > Hi Fabio, -> > Thus wrote Fabio Estevam (festevam@gmail.com): +> > Thus wrote Fabio Estevam (festevam at gmail.com): > >> I get audio working from SSI1, but I guess this is due to the fact > >> that the bootloader enables the SSI clock: @@ -86,7 +86,7 @@ uart1_ipg and uart_ipg_per and the clock seeting is In this case, both uart1 and uart_ipg_per are listed in the device tree - uart1: serial@43f90000 { + uart1: serial at 43f90000 { ... clocks = <&clks 120>, <&clks 57>; clock-names = "ipg", "per"; diff --git a/a/content_digest b/N1/content_digest index 1dffca9..17c0beb 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -2,32 +2,24 @@ "ref\0CAOMZO5A7W4rbPbZB8ERs518obrg+6F6mDeojkwJaGComFAJB0A@mail.gmail.com\0" "ref\020180308140851.GA25601@botnar.kaiser.cx\0" "ref\0CAOMZO5BdBWExt9FvPrfUG74Y62e4EUs6cqFyfVs5JuUtym00hQ@mail.gmail.com\0" - "From\0Martin Kaiser <martin@kaiser.cx>\0" - "Subject\0Re: [PATCH] clk: imx25: set correct parents for ssi ipg clocks\0" + "From\0martin@kaiser.cx (Martin Kaiser)\0" + "Subject\0[PATCH] clk: imx25: set correct parents for ssi ipg clocks\0" "Date\0Thu, 8 Mar 2018 17:46:54 +0100\0" - "To\0Fabio Estevam <festevam@gmail.com>\0" - "Cc\0Shawn Guo <shawnguo@kernel.org>" - Sascha Hauer <kernel@pengutronix.de> - Fabio Estevam <fabio.estevam@nxp.com> - Michael Turquette <mturquette@baylibre.com> - Stephen Boyd <sboyd@kernel.org> - moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE <linux-arm-kernel@lists.infradead.org> - linux-clk <linux-clk@vger.kernel.org> - " linux-kernel <linux-kernel@vger.kernel.org>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "Hi Fabio,\n" "\n" "thanks for the quick response.\n" "\n" - "Thus wrote Fabio Estevam (festevam@gmail.com):\n" + "Thus wrote Fabio Estevam (festevam at gmail.com):\n" "\n" "> Hi Martin,\n" "\n" "> On Thu, Mar 8, 2018 at 11:08 AM, Martin Kaiser <martin@kaiser.cx> wrote:\n" "> > Hi Fabio,\n" "\n" - "> > Thus wrote Fabio Estevam (festevam@gmail.com):\n" + "> > Thus wrote Fabio Estevam (festevam at gmail.com):\n" "\n" "> >> I get audio working from SSI1, but I guess this is due to the fact\n" "> >> that the bootloader enables the SSI clock:\n" @@ -104,7 +96,7 @@ "\n" "In this case, both uart1 and uart_ipg_per are listed in the device tree\n" "\n" - " uart1: serial@43f90000 { \n" + " uart1: serial at 43f90000 { \n" "...\n" " clocks = <&clks 120>, <&clks 57>; \n" " clock-names = \"ipg\", \"per\"; \n" @@ -127,4 +119,4 @@ "\n" Martin -ad8a9e2b943e613accee8a167fc45bebe600f03d5c104e29ae094bdebea00a74 +82025c4590414464d88a601a07d0eb65dfa200c23cb60f66f7a1f7e79bf07e96
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