diff for duplicates of <20180308184454.00000b4e@huawei.com> diff --git a/a/1.txt b/N1/1.txt index 923d487..5702dec 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,5 +1,5 @@ On Mon, 12 Feb 2018 18:33:42 +0000 -Jean-Philippe Brucker <jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org> wrote: +Jean-Philippe Brucker <jean-philippe.brucker@arm.com> wrote: > When using PRI or Stall, the PRI or event handler enqueues faults into the > core fault queue. Register it based on the SMMU features. @@ -12,7 +12,7 @@ Jean-Philippe Brucker <jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org> wrote > can consume them, by incrementing a 'batch' number on every cycle so the > flush handler only has to wait a complete cycle (two batch increments.) > -> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org> +> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> I think you have a potential incorrect free issue... See inline. Jonathan diff --git a/a/content_digest b/N1/content_digest index b951541..1773e0d 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,36 +1,50 @@ "ref\020180212183352.22730-1-jean-philippe.brucker@arm.com\0" "ref\020180212183352.22730-28-jean-philippe.brucker@arm.com\0" - "ref\020180212183352.22730-28-jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org\0" - "From\0Jonathan Cameron <Jonathan.Cameron-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>\0" + "From\0Jonathan Cameron <Jonathan.Cameron@huawei.com>\0" "Subject\0Re: [PATCH 27/37] iommu/arm-smmu-v3: Register fault workqueue\0" "Date\0Thu, 8 Mar 2018 17:44:54 +0000\0" - "To\0Jean-Philippe Brucker <jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org>\0" - "Cc\0mark.rutland-5wv7dgnIgG8@public.gmane.org" - ilias.apalodimas-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org - kvm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - xuzaibo-hv44wF8Li93QT0dZR+AlfA@public.gmane.org - will.deacon-5wv7dgnIgG8@public.gmane.org - okaya-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org - ashok.raj-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org - bharatku-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org - linux-acpi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - catalin.marinas-5wv7dgnIgG8@public.gmane.org - rfranz-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org - lenb-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org - devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org - bhelgaas-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org - linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org - dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org - rjw-LthD3rsA81gm4RdzfppkhA@public.gmane.org - iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org - sudeep.holla-5wv7dgnIgG8@public.gmane.org - " christian.koenig-5C7GfCeVMHo@public.gmane.org\0" + "To\0Jean-Philippe Brucker <jean-philippe.brucker@arm.com>\0" + "Cc\0<linux-arm-kernel@lists.infradead.org>" + <linux-pci@vger.kernel.org> + <linux-acpi@vger.kernel.org> + <devicetree@vger.kernel.org> + <iommu@lists.linux-foundation.org> + <kvm@vger.kernel.org> + <joro@8bytes.org> + <robh+dt@kernel.org> + <mark.rutland@arm.com> + <catalin.marinas@arm.com> + <will.deacon@arm.com> + <lorenzo.pieralisi@arm.com> + <hanjun.guo@linaro.org> + <sudeep.holla@arm.com> + <rjw@rjwysocki.net> + <lenb@kernel.org> + <robin.murphy@arm.com> + <bhelgaas@google.com> + <alex.williamson@redhat.com> + <tn@semihalf.com> + <liubo95@huawei.com> + <thunder.leizhen@huawei.com> + <xieyisheng1@huawei.com> + <xuzaibo@huawei.com> + <ilias.apalodimas@linaro.org> + <shunyong.yang@hxt-semitech.com> + <nwatters@codeaurora.org> + <okaya@codeaurora.org> + <jcrouse@codeaurora.org> + <rfranz@cavium.com> + <dwmw2@infradead.org> + <jacob.jun.pan@linux.intel.com> + <yi.l.liu@intel.com> + <ashok.raj@intel.com> + <robdclark@gmail.com> + <christian.koenig@amd.com> + " <bharatku@xilinx.com>\0" "\00:1\0" "b\0" "On Mon, 12 Feb 2018 18:33:42 +0000\n" - "Jean-Philippe Brucker <jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org> wrote:\n" + "Jean-Philippe Brucker <jean-philippe.brucker@arm.com> wrote:\n" "\n" "> When using PRI or Stall, the PRI or event handler enqueues faults into the\n" "> core fault queue. Register it based on the SMMU features.\n" @@ -43,7 +57,7 @@ "> can consume them, by incrementing a 'batch' number on every cycle so the\n" "> flush handler only has to wait a complete cycle (two batch increments.)\n" "> \n" - "> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org>\n" + "> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>\n" "I think you have a potential incorrect free issue... See inline.\n" "\n" "Jonathan\n" @@ -260,4 +274,4 @@ "> \n" "> \treturn 0;" -968645ff2120ece78e427308d24aef186b7081e6d793639ecc45aa3c6ebab84b +f3fc2b49071da0aa496f170872e747ccde80a9201dcead66be0aaf46990055c1
diff --git a/a/1.txt b/N2/1.txt index 923d487..5702dec 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -1,5 +1,5 @@ On Mon, 12 Feb 2018 18:33:42 +0000 -Jean-Philippe Brucker <jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org> wrote: +Jean-Philippe Brucker <jean-philippe.brucker@arm.com> wrote: > When using PRI or Stall, the PRI or event handler enqueues faults into the > core fault queue. Register it based on the SMMU features. @@ -12,7 +12,7 @@ Jean-Philippe Brucker <jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org> wrote > can consume them, by incrementing a 'batch' number on every cycle so the > flush handler only has to wait a complete cycle (two batch increments.) > -> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org> +> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> I think you have a potential incorrect free issue... See inline. Jonathan diff --git a/a/content_digest b/N2/content_digest index b951541..3d1fbf6 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,36 +1,13 @@ "ref\020180212183352.22730-1-jean-philippe.brucker@arm.com\0" "ref\020180212183352.22730-28-jean-philippe.brucker@arm.com\0" - "ref\020180212183352.22730-28-jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org\0" - "From\0Jonathan Cameron <Jonathan.Cameron-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>\0" - "Subject\0Re: [PATCH 27/37] iommu/arm-smmu-v3: Register fault workqueue\0" + "From\0Jonathan.Cameron@huawei.com (Jonathan Cameron)\0" + "Subject\0[PATCH 27/37] iommu/arm-smmu-v3: Register fault workqueue\0" "Date\0Thu, 8 Mar 2018 17:44:54 +0000\0" - "To\0Jean-Philippe Brucker <jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org>\0" - "Cc\0mark.rutland-5wv7dgnIgG8@public.gmane.org" - ilias.apalodimas-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org - kvm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - xuzaibo-hv44wF8Li93QT0dZR+AlfA@public.gmane.org - will.deacon-5wv7dgnIgG8@public.gmane.org - okaya-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org - ashok.raj-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org - bharatku-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org - linux-acpi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - catalin.marinas-5wv7dgnIgG8@public.gmane.org - rfranz-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org - lenb-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org - devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org - bhelgaas-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org - linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org - dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org - rjw-LthD3rsA81gm4RdzfppkhA@public.gmane.org - iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org - sudeep.holla-5wv7dgnIgG8@public.gmane.org - " christian.koenig-5C7GfCeVMHo@public.gmane.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On Mon, 12 Feb 2018 18:33:42 +0000\n" - "Jean-Philippe Brucker <jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org> wrote:\n" + "Jean-Philippe Brucker <jean-philippe.brucker@arm.com> wrote:\n" "\n" "> When using PRI or Stall, the PRI or event handler enqueues faults into the\n" "> core fault queue. Register it based on the SMMU features.\n" @@ -43,7 +20,7 @@ "> can consume them, by incrementing a 'batch' number on every cycle so the\n" "> flush handler only has to wait a complete cycle (two batch increments.)\n" "> \n" - "> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org>\n" + "> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>\n" "I think you have a potential incorrect free issue... See inline.\n" "\n" "Jonathan\n" @@ -260,4 +237,4 @@ "> \n" "> \treturn 0;" -968645ff2120ece78e427308d24aef186b7081e6d793639ecc45aa3c6ebab84b +275f56262746793089bb61a443b0e7ecac3683e933eb966116113ed27b594b66
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