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From: Pavel Machek <pavel@ucw.cz>
To: Jose Abreu <Jose.Abreu@synopsys.com>
Cc: Niklas Cassel <niklas.cassel@axis.com>,
	Giuseppe Cavallaro <peppe.cavallaro@st.com>,
	Alexandre Torgue <alexandre.torgue@st.com>,
	Niklas Cassel <niklass@axis.com>,
	netdev@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH net-next] net: stmmac: remove superfluous wmb() memory barriers
Date: Fri, 9 Mar 2018 11:48:56 +0100	[thread overview]
Message-ID: <20180309104855.GA17998@amd> (raw)
In-Reply-To: <f245ba4f-9c08-3f04-b0db-97582cc06153@synopsys.com>

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On Fri 2018-03-09 10:26:11, Jose Abreu wrote:
> Hi Niklas,
> 
> On 08-03-2018 10:30, Niklas Cassel wrote:
> > These wmb() memory barriers are performed after the last descriptor write,
> > and they are followed by enable_dma_transmission()/set_tx_tail_ptr(),
> > i.e. a writel() to MMIO register space.
> > Since writel() itself performs the equivalent of a wmb() 
> 
> Sorry but I know at least two architectures which don't do a
> wmb() upon an writel [1] [2]. This can be critical if if we are
> accessing the device through some slow or filled bus which will
> delay accesses to the device IO. Notice that writel and then
> readl to the same address will force CPU to wait for writel
> completion before readl, but in this case we are using DMA and
> then writel so I think a wmb() before the writel is a safe measure.

This also matches documentation, as I tried to point out.

-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html

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  reply	other threads:[~2018-03-09 10:48 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-08 10:30 [PATCH net-next] net: stmmac: remove superfluous wmb() memory barriers Niklas Cassel
2018-03-09  2:50 ` David Miller
2018-03-09 10:26 ` Jose Abreu
2018-03-09 10:48   ` Pavel Machek [this message]
2018-03-09 15:15   ` David Miller
2018-03-12  8:55     ` Niklas Cassel
2018-03-13  1:20       ` David Miller

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