From: Shawn Guo <shawn.guo@linaro.org>
To: Stephen Boyd <sboyd@codeaurora.org>
Cc: Michael Turquette <mturquette@baylibre.com>,
Jiancheng Xue <xuejiancheng@hisilicon.com>,
Jianguo Sun <sunjianguo1@huawei.com>,
linux-clk@vger.kernel.org,
tianshuliang <tianshuliang@hisilicon.com>
Subject: Re: [PATCH v2 1/2] clk: hisilicon: add hisi phase clock support
Date: Mon, 12 Mar 2018 15:56:15 +0800 [thread overview]
Message-ID: <20180312075613.GA26413@dragon> (raw)
In-Reply-To: <1520233292-14704-2-git-send-email-shawn.guo@linaro.org>
Hi Stephen,
On Mon, Mar 05, 2018 at 03:01:31PM +0800, Shawn Guo wrote:
> From: tianshuliang <tianshuliang@hisilicon.com>
>
> Add a phase clock type for HiSilicon SoCs,which supports
> clk_set_phase operation.
>
> Signed-off-by: tianshuliang <tianshuliang@hisilicon.com>
> Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com>
It misses the SoB of myself. I will add it and include these two
patches into the PR sent to you.
Shawn
next prev parent reply other threads:[~2018-03-12 7:56 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-05 7:01 [PATCH v2 0/2] Add eMMC phase clock support for Hi3798CV200 Shawn Guo
2018-03-05 7:01 ` [PATCH v2 1/2] clk: hisilicon: add hisi phase clock support Shawn Guo
2018-03-12 7:56 ` Shawn Guo [this message]
2018-03-05 7:01 ` [PATCH v2 2/2] clk: hi3798cv200: add emmc sample and drive clock Shawn Guo
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