From: James Hogan <jhogan@kernel.org>
To: Marc Zyngier <marc.zyngier@arm.com>
Cc: Matt Redfearn <matt.redfearn@mips.com>,
Ralf Baechle <ralf@linux-mips.org>,
Thomas Gleixner <tglx@linutronix.de>,
linux-mips@linux-mips.org, Jason Cooper <jason@lakedaemon.net>,
Dengcheng Zhu <dengcheng.zhu@mips.com>,
linux-kernel@vger.kernel.org,
Philippe Ombredanne <pombredanne@nexb.com>,
Paul Burton <paul.burton@mips.com>,
Kate Stewart <kstewart@linuxfoundation.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Subject: Re: [PATCH 0/6] irqchip/mips-gic: Enable & use VEIC mode if available
Date: Wed, 14 Mar 2018 15:46:42 +0000 [thread overview]
Message-ID: <20180314154641.GA8976@saruman> (raw)
In-Reply-To: <c9b5d20c-7adf-5308-1a45-21471d206d10@arm.com>
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On Wed, Mar 14, 2018 at 11:15:47AM +0000, Marc Zyngier wrote:
> Hi Matt,
>
> On 05/01/18 10:31, Matt Redfearn wrote:
> >
> > This series enables the MIPS GIC driver to make use of the EIC mode
> > supported in some MIPS cores. In this mode, the cores 6 interrupt lines
> > are switched to represent a vector number, 0..63. Currently all GIC
> > interrupts are routed to a single CPU interrupt pin, but this is
> > inefficient since we end up checking both local and shared interrupt
> > flag registers for both local and shared interrupts. This introduces
> > additional latency into the interrupt paths. With EIC mode this can be
> > improved by using separate vectors for local and shared interrupts.
> >
> > This series is based on 4.15-rc6 and has been tested on Boston, Malta &
> > SEAD3 MIPS platforms implementing a GIC with and without EIC mode
> > supported in hardware.
>
> What the status of this series?
FYI I've been meaning to test it with KVM, since host EIC I think will
affect KVM & guest stuff.
Cheers
James
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next prev parent reply other threads:[~2018-03-14 15:47 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-05 10:31 [PATCH 0/6] irqchip/mips-gic: Enable & use VEIC mode if available Matt Redfearn
2018-01-05 10:31 ` Matt Redfearn
2018-01-05 10:31 ` [PATCH 1/6] MIPS: Move ehb() to barrier.h Matt Redfearn
2018-01-05 10:31 ` Matt Redfearn
2018-05-17 14:30 ` James Hogan
2018-01-05 10:31 ` [PATCH 2/6] MIPS: CPS: Introduce mips_gic_enable_eic Matt Redfearn
2018-01-05 10:31 ` Matt Redfearn
2018-01-05 10:31 ` [PATCH 3/6] MIPS: Generic: Support GIC in EIC mode Matt Redfearn
2018-01-05 10:31 ` Matt Redfearn
2018-02-05 14:11 ` James Hogan
2018-01-05 10:31 ` [PATCH 4/6] irqchip/mips-gic: Always attempt to enable " Matt Redfearn
2018-01-05 10:31 ` Matt Redfearn
2018-01-05 10:31 ` [PATCH 5/6] irqchip/mips-gic: Use separate vector for shared interrupts in " Matt Redfearn
2018-01-05 10:31 ` Matt Redfearn
2018-01-05 10:31 ` [PATCH 6/6] irqchip/mips-gic: Separate local interrupt handling Matt Redfearn
2018-01-05 10:31 ` Matt Redfearn
2018-03-14 11:15 ` [PATCH 0/6] irqchip/mips-gic: Enable & use VEIC mode if available Marc Zyngier
2018-03-14 15:46 ` James Hogan [this message]
2018-03-14 15:53 ` Marc Zyngier
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