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From: Jeff McGee <jeff.mcgee@intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: Flush pending interrupt following a GPU reset
Date: Wed, 21 Mar 2018 08:55:16 -0700	[thread overview]
Message-ID: <20180321155516.GB19343@jeffdesk> (raw)
In-Reply-To: <20180321150023.29252-1-chris@chris-wilson.co.uk>

On Wed, Mar 21, 2018 at 03:00:23PM +0000, Chris Wilson wrote:
> After resetting the GPU (or subset of engines), call synchronize_irq()
> to flush any pending irq before proceeding with the cleanup. For a
> device level reset, we disable the interupts around the reset, but when
> resetting just one engine, we have to avoid such global disabling. This
> leaves us open to an interrupt arriving for the engine as we try to
> reset it. We already do try to flush the IIR following the reset, but we
> have to ensure that the in-flight interrupt does not land after we start
> cleaning up after the reset; enter synchronize_irq().
> 
> As it current stands, we very rarely, but fatally, see sequences such as:
> 
>     2.... 57964564us : execlists_reset_prepare: rcs0
>     2.... 57964613us : execlists_reset: rcs0 seqno=424
>     0d.h1 57964615us : gen8_cs_irq_handler: rcs0 CS active=1
>     2d..1 57964617us : __i915_request_unsubmit: rcs0 fence 29:1056 <- global_seqno 1060
>     2.... 57964703us : execlists_reset_finish: rcs0
>     0..s. 57964705us : execlists_submission_tasklet: rcs0 awake?=1, active=0, irq-posted?=1
> 
I can repro this sequence easily with force preemption IGT. Just tried this
patch and the issue is still there. For the moment I can just mitigate with
https://patchwork.freedesktop.org/patch/211086/

> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Cc: Michel Thierry <michel.thierry@intel.com>
> Cc: Michał Winiarski <michal.winiarski@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_uncore.c | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index 4c616d074a97..04830d6125d6 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -2116,11 +2116,14 @@ int intel_gpu_reset(struct drm_i915_private *dev_priv, unsigned engine_mask)
>  		i915_stop_engines(dev_priv, engine_mask);
>  
>  		ret = -ENODEV;
> -		if (reset)
> +		if (reset) {
> +			GEM_TRACE("engine_mask=%x\n", engine_mask);
>  			ret = reset(dev_priv, engine_mask);
> +		}
>  		if (ret != -ETIMEDOUT)
>  			break;
>  
> +		synchronize_irq(dev_priv->drm.irq);
>  		cond_resched();
>  	}
>  	intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
> -- 
> 2.16.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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  reply	other threads:[~2018-03-21 16:10 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-21 15:00 [PATCH] drm/i915: Flush pending interrupt following a GPU reset Chris Wilson
2018-03-21 15:55 ` Jeff McGee [this message]
2018-03-21 16:41   ` Chris Wilson
2018-03-21 16:42   ` Chris Wilson
2018-03-21 17:10     ` Jeff McGee
2018-03-21 16:59 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2018-03-21 17:14 ` ✓ Fi.CI.BAT: success " Patchwork
2018-03-21 21:13 ` ✓ Fi.CI.IGT: " Patchwork

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