From: Jeff McGee <jeff.mcgee@intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: kalyan.kondapally@intel.com, intel-gfx@lists.freedesktop.org,
ben@bwidawsk.net
Subject: Re: [RFC 6/8] drm/i915: Fix loop on CSB processing
Date: Wed, 21 Mar 2018 11:29:46 -0700 [thread overview]
Message-ID: <20180321182946.GF19343@jeffdesk> (raw)
In-Reply-To: <152165560468.4865.10552577657589052123@mail.alporthouse.com>
On Wed, Mar 21, 2018 at 06:06:44PM +0000, Chris Wilson wrote:
> Quoting Jeff McGee (2018-03-21 17:33:04)
> > On Wed, Mar 21, 2018 at 10:26:23AM -0700, jeff.mcgee@intel.com wrote:
> > > From: Jeff McGee <jeff.mcgee@intel.com>
> > >
> > > Signed-off-by: Jeff McGee <jeff.mcgee@intel.com>
> > > ---
> > > drivers/gpu/drm/i915/intel_lrc.c | 2 +-
> > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> > > index beb81f13a3cc..cec4e1653daf 100644
> > > --- a/drivers/gpu/drm/i915/intel_lrc.c
> > > +++ b/drivers/gpu/drm/i915/intel_lrc.c
> > > @@ -1009,7 +1009,7 @@ static void execlists_submission_tasklet(unsigned long data)
> > > * imposing the cost of a locked atomic transaction when submitting a
> > > * new request (outside of the context-switch interrupt).
> > > */
> > > - if (test_bit(ENGINE_IRQ_EXECLIST, &engine->irq_posted))
> > > + while (test_bit(ENGINE_IRQ_EXECLIST, &engine->irq_posted))
> > Assuming that this accidentally went missing in the refactor. Chris?
>
> No. process_csb became a do{} while. The caller did a test_bit to avoid
> the function call for normal rescheduling paths.
> -Chris
But there is no loop in process_csb().
-Jeff
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next prev parent reply other threads:[~2018-03-21 18:45 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-21 17:26 [RFC 0/8] Force preemption jeff.mcgee
2018-03-21 17:26 ` [RFC 1/8] drm/i915/execlists: Refactor out complete_preempt_context() jeff.mcgee
2018-03-21 17:26 ` [RFC 2/8] drm/i915: Add control flags to i915_handle_error() jeff.mcgee
2018-03-21 17:26 ` [RFC 3/8] drm/i915: Move engine reset prepare/finish to backends jeff.mcgee
2018-03-21 17:26 ` [RFC 4/8] drm/i915: Split execlists/guc reset prepartions jeff.mcgee
2018-03-21 17:26 ` [RFC 5/8] drm/i915/execlists: Flush pending preemption events during reset jeff.mcgee
2018-03-21 17:26 ` [RFC 6/8] drm/i915: Fix loop on CSB processing jeff.mcgee
2018-03-21 17:33 ` Jeff McGee
2018-03-21 18:06 ` Chris Wilson
2018-03-21 18:29 ` Jeff McGee [this message]
2018-03-21 19:04 ` Chris Wilson
2018-03-21 17:26 ` [RFC 7/8] drm/i915: Skip CSB processing on invalid CSB tail jeff.mcgee
2018-03-21 17:31 ` Jeff McGee
2018-03-21 18:12 ` Chris Wilson
2018-03-21 19:06 ` Chris Wilson
2018-03-21 17:26 ` [RFC 8/8] drm/i915: Force preemption to complete via engine reset jeff.mcgee
2018-03-21 18:50 ` ✗ Fi.CI.BAT: failure for Force preemption (rev2) Patchwork
2018-03-22 9:22 ` [RFC 0/8] Force preemption Tvrtko Ursulin
2018-03-22 9:28 ` Chris Wilson
2018-03-22 14:34 ` Jeff McGee
2018-03-22 15:35 ` Chris Wilson
2018-03-22 15:44 ` Jeff McGee
2018-03-22 15:57 ` Tvrtko Ursulin
2018-03-22 16:01 ` Jeff McGee
2018-03-22 17:41 ` Tvrtko Ursulin
2018-03-22 19:08 ` Jeff McGee
2018-03-22 19:59 ` Bloomfield, Jon
2018-03-23 13:20 ` Joonas Lahtinen
2018-03-23 13:37 ` Chris Wilson
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