From: "Richard W.M. Jones" <rjones@redhat.com>
To: Michael Clark <mjc@sifive.com>
Cc: qemu-devel@nongnu.org, patches@groups.riscv.org,
Palmer Dabbelt <palmer@sifive.com>,
Sagar Karandikar <sagark@eecs.berkeley.edu>,
Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
Peter Maydell <peter.maydell@linaro.org>
Subject: Re: [Qemu-devel] [PATCH v6 26/26] RISC-V: Workaround for critical mstatus.FS MTTCG bug
Date: Sat, 24 Mar 2018 19:46:34 +0000 [thread overview]
Message-ID: <20180324194634.GW2787@redhat.com> (raw)
In-Reply-To: <1521915220-65389-15-git-send-email-mjc@sifive.com>
On Sat, Mar 24, 2018 at 11:13:40AM -0700, Michael Clark wrote:
> This change is a workaround for a bug where mstatus.FS
> is not correctly reporting dirty when MTTCG and SMP are
> enabled which results in the floating point register file
> not being saved during context switches. This a critical
> bug for RISC-V in QEMU as it results in floating point
> register file corruption when running SMP Linux in the
> RISC-V 'virt' machine.
>
> This workaround will return dirty if mstatus.FS is
> switched from off to initial or clean. We have checked
> the specification and it is legal for an implementation
> to return either off, or dirty, if set to initial or clean.
>
> This workaround will result in unnecessary floating point
> save restore. When mstatus.FS is off, floating point
> instruction trap to indicate the process is using the FPU.
> The OS can then save floating-point state of the previous
> process using the FPU and set mstatus.FS to initial or
> clean. With this workaround, mstatus.FS will always return
> dirty if set to a non-zero value, indicating floating point
> save restore is necessary, versus misreporting mstatus.FS
> resulting in floating point register file corruption.
>
> Cc: Palmer Dabbelt <palmer@sifive.com>
> Cc: Sagar Karandikar <sagark@eecs.berkeley.edu>
> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
> Cc: Richard W.M. Jones <rjones@redhat.com>
> Cc: Peter Maydell <peter.maydell@linaro.org>
> Signed-off-by: Michael Clark <mjc@sifive.com>
I tested this by running qemu from git with and without this patch,
both times compiling and running the “sched.c” test program:
http://oirase.annexia.org/tmp/sched.c
In my tests it fixes the problem, and therefore:
Tested-by: Richard W.M. Jones <rjones@redhat.com>
Rich.
--
Richard Jones, Virtualization Group, Red Hat http://people.redhat.com/~rjones
Read my programming and virtualization blog: http://rwmj.wordpress.com
virt-p2v converts physical machines to virtual machines. Boot with a
live CD or over the network (PXE) and turn machines into KVM guests.
http://libguestfs.org/virt-v2v
next prev parent reply other threads:[~2018-03-24 19:53 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-24 18:13 [Qemu-devel] [PATCH v6 00/26] RISC-V: Fixes and cleanups for QEMU 2.12 Michael Clark
2018-03-24 18:13 ` [Qemu-devel] [PATCH v6 06/26] RISC-V: Mark ROM read-only after copying in code Michael Clark
2018-03-24 19:45 ` Michael Clark
2018-03-24 20:19 ` Michael Clark
2018-03-24 21:23 ` Peter Maydell
2018-03-25 0:23 ` Michael Clark
2018-03-25 12:47 ` Peter Maydell
2018-03-26 22:22 ` Michael Clark
2018-03-24 18:13 ` [Qemu-devel] [PATCH v6 08/26] RISC-V: Make sure rom has space for fdt Michael Clark
2018-03-24 21:25 ` Peter Maydell
2018-03-24 22:35 ` Michael Clark
2018-03-24 18:13 ` [Qemu-devel] [PATCH v6 10/26] RISC-V: Improve page table walker spec compliance Michael Clark
2018-03-24 19:39 ` Michael Clark
2018-03-24 18:13 ` [Qemu-devel] [PATCH v6 11/26] RISC-V: Update E order and I extension order Michael Clark
2018-03-24 18:13 ` [Qemu-devel] [PATCH v6 14/26] RISC-V: Use memory_region_is_ram in pte update Michael Clark
2018-03-24 18:13 ` [Qemu-devel] [PATCH v6 16/26] RISC-V: Hardwire satp to 0 for no-mmu case Michael Clark
2018-03-24 18:13 ` [Qemu-devel] [PATCH v6 18/26] RISC-V: riscv-qemu port supports sv39 and sv48 Michael Clark
2018-03-24 18:13 ` [Qemu-devel] [PATCH v6 19/26] RISC-V: vectored traps are optional Michael Clark
2018-03-24 18:13 ` [Qemu-devel] [PATCH v6 20/26] RISC-V: No traps on writes to misa, minstret, mcycle Michael Clark
2018-03-24 18:13 ` [Qemu-devel] [PATCH v6 21/26] RISC-V: Remove support for adhoc X_COP interrupt Michael Clark
2018-03-24 18:13 ` [Qemu-devel] [PATCH v6 23/26] RISC-V: Clear mtval/stval on exceptions without info Michael Clark
2018-03-24 18:13 ` [Qemu-devel] [PATCH v6 24/26] RISC-V: Remove erroneous comment from translate.c Michael Clark
2018-03-24 18:13 ` [Qemu-devel] [PATCH v6 25/26] RISC-V: Fix incorrect disassembly for addiw Michael Clark
2018-03-24 18:13 ` [Qemu-devel] [PATCH v6 26/26] RISC-V: Workaround for critical mstatus.FS MTTCG bug Michael Clark
2018-03-24 19:17 ` Michael Clark
2018-03-24 19:46 ` Richard W.M. Jones [this message]
2018-03-25 15:03 ` [Qemu-devel] [PATCH v6 00/26] RISC-V: Fixes and cleanups for QEMU 2.12 Peter Maydell
2018-03-26 18:07 ` [Qemu-devel] [patches] " Michael Clark
2018-03-26 23:14 ` Michael Clark
2018-03-26 23:45 ` Michael Clark
2018-03-27 10:21 ` Daniel P. Berrangé
2018-03-27 9:42 ` Peter Maydell
2018-03-27 18:39 ` Michael Clark
2018-03-27 19:00 ` Michael Clark
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