From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Subject: [2/2] x86/MCE: Always save MCA_{ADDR,MISC,SYND} register contents From: Borislav Petkov Message-Id: <20180326193526.GK25548@pd.tnic> Date: Mon, 26 Mar 2018 21:35:26 +0200 To: Yazen Ghannam Cc: linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org, tony.luck@intel.com, x86@kernel.org List-ID: T24gTW9uLCBNYXIgMjYsIDIwMTggYXQgMDI6MTU6MjZQTSAtMDUwMCwgWWF6ZW4gR2hhbm5hbSB3 cm90ZToKPiBGcm9tOiBZYXplbiBHaGFubmFtIDx5YXplbi5naGFubmFtQGFtZC5jb20+Cj4gCj4g VGhlIEludGVsIFNETSBhbmQgQU1EIEFQTSBib3RoIHN0YXRlIHRoYXQgdGhlIGNvbnRlbnRzIG9m IHRoZSBNQ0FfQUREUgo+IHJlZ2lzdGVyIHNob3VsZCBiZSBzYXZlZCBpZiBNQ0FfU1RBVFVTW0FE RFJWXSBpcyBzZXQuIFRoZSBzYW1lIGFwcGxpZXMKPiB0byBNQ0FfTUlTQyBhbmQgTUNBX1NZTkQg KG9uIFNNQ0Egc3lzdGVtcykgYW5kIHRoZWlyIHJlc3BlY3RpdmUgdmFsaWQKPiBiaXRzLgo+IAo+ IEhvd2V2ZXIsIHRoZSBGYW0xN2ggUHJvY2Vzc29yIFByb2dyYW1taW5nIFJlZmVyZW5jZSBzdGF0 ZXMKPiAiRXJyb3IgaGFuZGxlcnMgc2hvdWxkIHNhdmUgdGhlIHZhbHVlcyBpbiBNQ0FfQUREUiwg TUNBX01JU0MwLCBhbmQKPiBNQ0FfU1lORCBldmVuIGlmIE1DQV9TVEFUVVNbQWRkclZdLCBNQ0Ff U1RBVFVTW01pc2NWXSwgYW5kCj4gTUNBX1NUQVRVU1tTeW5kVl0gYXJlIHplcm8uIgoKV2VsbCwg dGhlbiB5b3UgY2FuJ3QgcmVtb3ZlIHZhbGlkIGJpdCBjaGVja3MgZm9yIG9sZGVyIGZhbWlsaWVz LiBUaGlzCnNvdW5kcyBsaWtlIEYxN2ggb25seS4KCklmIHNvLCBpdCBiZXR0ZXIgYmUgYWJzdHJh Y3RlZCBhd2F5IGNsZWFubHkgYW5kIG5vdCBjaGFuZ2luZyB0aGUgZ2VuZXJpYwpjb2RlLgoKPiAK PiBUaGlzIGlzIHRvIGVuc3VyZSB0aGF0IGFsbCBNQ0Egc3RhdGUgaW5mb3JtYXRpb24gaXMgY29s bGVjdGVkIGV2ZW4gaWYKPiBzb2Z0d2FyZSBjYW5ub3QgYWN0IHVwb24gaXQgKGJlY2F1c2UgdGhl IHZhbGlkIGJpdHMgYXJlIGNsZWFyZWQpLgo+IAo+IFNvIGFsd2F5cyBzYXZlIHRoZSBhdXhpbGlh cnkgTUNBIHJlZ2lzdGVyIGNvbnRlbnRzIGV2ZW4gaWYgdGhlIHZhbGlkCj4gYml0cyBhcmUgY2xl YXJlZC4gVGhpcyBzaG91bGQgbm90IGFmZmVjdCBlcnJvciBwcm9jZXNzaW5nIGJlY2F1c2UKPiBz b2Z0d2FyZSBzaG91bGQgc3RpbGwgY2hlY2sgdGhlIHZhbGlkIGJpdHMgYmVmb3JlIHVzaW5nIHRo ZSByZWdpc3Rlcgo+IGNvbnRlbnRzIGZvciBlcnJvciBwcm9jZXNzaW5nLgo+IAo+IEFsc28sIHBy aW50IE1DQV97QUREUixNSVNDLFNZTkR9IGV2ZW4gaWYgdGhlaXIgdmFsaWQgYml0cyBhcmUgbm90 IHNldC4KPiBQcmludGluZyBmcm9tIEVEQUMvbWNlX2FtZCBpcyBpbmNsdWRlZCBoZXJlIHNpbmNl IHdlIHdhbnQgdG8gZG8gdGhpcyBvbgo+IEFNRCBzeXN0ZW1zLgo+IAo+IFNpZ25lZC1vZmYtYnk6 IFlhemVuIEdoYW5uYW0gPHlhemVuLmdoYW5uYW1AYW1kLmNvbT4KPiAtLS0KPiAgYXJjaC94ODYv a2VybmVsL2NwdS9tY2hlY2svbWNlLmMgICAgIHwgMjMgKysrKysrKy0tLS0tLS0tLS0tLS0tLS0K PiAgYXJjaC94ODYva2VybmVsL2NwdS9tY2hlY2svbWNlX2FtZC5jIHwgMTAgKysrLS0tLS0tLQo+ ICBkcml2ZXJzL2VkYWMvbWNlX2FtZC5jICAgICAgICAgICAgICAgfCAxMCArKystLS0tLS0tCj4g IDMgZmlsZXMgY2hhbmdlZCwgMTMgaW5zZXJ0aW9ucygrKSwgMzAgZGVsZXRpb25zKC0pCj4gCj4g ZGlmZiAtLWdpdCBhL2FyY2gveDg2L2tlcm5lbC9jcHUvbWNoZWNrL21jZS5jIGIvYXJjaC94ODYv a2VybmVsL2NwdS9tY2hlY2svbWNlLmMKPiBpbmRleCA0MmNmMjg4MGQwZWQuLmE1NTZlMWNhZGZi YyAxMDA2NDQKPiAtLS0gYS9hcmNoL3g4Ni9rZXJuZWwvY3B1L21jaGVjay9tY2UuYwo+ICsrKyBi L2FyY2gveDg2L2tlcm5lbC9jcHUvbWNoZWNrL21jZS5jCj4gQEAgLTI0OCwxOSArMjQ4LDE0IEBA IHN0YXRpYyB2b2lkIF9fcHJpbnRfbWNlKHN0cnVjdCBtY2UgKm0pCj4gIAl9Cj4gIAo+ICAJcHJf ZW1lcmcoSFdfRVJSICJUU0MgJWxseCAiLCBtLT50c2MpOwo+IC0JaWYgKG0tPmFkZHIpCj4gLQkJ cHJfY29udCgiQUREUiAlbGx4ICIsIG0tPmFkZHIpOwo+IC0JaWYgKG0tPm1pc2MpCj4gLQkJcHJf Y29udCgiTUlTQyAlbGx4ICIsIG0tPm1pc2MpOwo+ICsJcHJfY29udCgiQUREUiAlMDE2bGx4ICIs IG0tPmFkZHIpOwo+ICsJcHJfY29udCgiTUlTQyAlMDE2bGx4XG4iLCBtLT5taXNjKTsKCllvdSBz aW1wbHkgY2FuJ3QgZG8gdGhpcyAtIHRoaXMgaXMgZ2VuZXJpYyBjb2RlLCBub3QgQU1EIG9ubHku Cg== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751776AbeCZTgS (ORCPT ); Mon, 26 Mar 2018 15:36:18 -0400 Received: from mail.skyhub.de ([5.9.137.197]:36996 "EHLO mail.skyhub.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751124AbeCZTgR (ORCPT ); Mon, 26 Mar 2018 15:36:17 -0400 Date: Mon, 26 Mar 2018 21:35:26 +0200 From: Borislav Petkov To: Yazen Ghannam Cc: linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org, tony.luck@intel.com, x86@kernel.org Subject: Re: [PATCH 2/2] x86/MCE: Always save MCA_{ADDR,MISC,SYND} register contents Message-ID: <20180326193526.GK25548@pd.tnic> References: <20180326191526.64314-1-Yazen.Ghannam@amd.com> <20180326191526.64314-2-Yazen.Ghannam@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20180326191526.64314-2-Yazen.Ghannam@amd.com> User-Agent: Mutt/1.9.3 (2018-01-21) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Mar 26, 2018 at 02:15:26PM -0500, Yazen Ghannam wrote: > From: Yazen Ghannam > > The Intel SDM and AMD APM both state that the contents of the MCA_ADDR > register should be saved if MCA_STATUS[ADDRV] is set. The same applies > to MCA_MISC and MCA_SYND (on SMCA systems) and their respective valid > bits. > > However, the Fam17h Processor Programming Reference states > "Error handlers should save the values in MCA_ADDR, MCA_MISC0, and > MCA_SYND even if MCA_STATUS[AddrV], MCA_STATUS[MiscV], and > MCA_STATUS[SyndV] are zero." Well, then you can't remove valid bit checks for older families. This sounds like F17h only. If so, it better be abstracted away cleanly and not changing the generic code. > > This is to ensure that all MCA state information is collected even if > software cannot act upon it (because the valid bits are cleared). > > So always save the auxiliary MCA register contents even if the valid > bits are cleared. This should not affect error processing because > software should still check the valid bits before using the register > contents for error processing. > > Also, print MCA_{ADDR,MISC,SYND} even if their valid bits are not set. > Printing from EDAC/mce_amd is included here since we want to do this on > AMD systems. > > Signed-off-by: Yazen Ghannam > --- > arch/x86/kernel/cpu/mcheck/mce.c | 23 +++++++---------------- > arch/x86/kernel/cpu/mcheck/mce_amd.c | 10 +++------- > drivers/edac/mce_amd.c | 10 +++------- > 3 files changed, 13 insertions(+), 30 deletions(-) > > diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c > index 42cf2880d0ed..a556e1cadfbc 100644 > --- a/arch/x86/kernel/cpu/mcheck/mce.c > +++ b/arch/x86/kernel/cpu/mcheck/mce.c > @@ -248,19 +248,14 @@ static void __print_mce(struct mce *m) > } > > pr_emerg(HW_ERR "TSC %llx ", m->tsc); > - if (m->addr) > - pr_cont("ADDR %llx ", m->addr); > - if (m->misc) > - pr_cont("MISC %llx ", m->misc); > + pr_cont("ADDR %016llx ", m->addr); > + pr_cont("MISC %016llx\n", m->misc); You simply can't do this - this is generic code, not AMD only. -- Regards/Gruss, Boris. Good mailing practices for 400: avoid top-posting and trim the reply.