diff for duplicates of <20180326200955.GG28372@pd.tnic> diff --git a/a/1.txt b/N1/1.txt index fb21ac3..6ad9d5e 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -4,3 +4,9 @@ On Mon, Mar 26, 2018 at 08:05:37PM +0000, Ghannam, Yazen wrote: No, this needs to be AMD-specific because it will confuse people using Intel machines. + +-- +Regards/Gruss, + Boris. + +Good mailing practices for 400: avoid top-posting and trim the reply. diff --git a/a/content_digest b/N1/content_digest index 7f961f3..5b74f0a 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,5 +1,9 @@ + "ref\020180326191526.64314-1-Yazen.Ghannam@amd.com\0" + "ref\020180326191526.64314-2-Yazen.Ghannam@amd.com\0" + "ref\020180326193526.GK25548@pd.tnic\0" + "ref\0DM5PR12MB1916CB8536B257923AC76CA7F8AD0@DM5PR12MB1916.namprd12.prod.outlook.com\0" "From\0Borislav Petkov <bp@alien8.de>\0" - "Subject\0[2/2] x86/MCE: Always save MCA_{ADDR,MISC,SYND} register contents\0" + "Subject\0Re: [PATCH 2/2] x86/MCE: Always save MCA_{ADDR,MISC,SYND} register contents\0" "Date\0Mon, 26 Mar 2018 22:09:55 +0200\0" "To\0Ghannam" " Yazen <Yazen.Ghannam@amd.com>\0" @@ -14,6 +18,12 @@ "> to read the registers whether or not the valid bits are set.\n" "\n" "No, this needs to be AMD-specific because it will confuse people using\n" - Intel machines. + "Intel machines.\n" + "\n" + "-- \n" + "Regards/Gruss,\n" + " Boris.\n" + "\n" + Good mailing practices for 400: avoid top-posting and trim the reply. -88462d2f4bebd3c0fa85bbcd499f5b6af84734a950e000296fa685017841c7f7 +444a4fa6caa3660546169eb1b9fb648fdbb245d92fa62152d7757231ff0ff82b
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