From mboxrd@z Thu Jan 1 00:00:00 1970 From: Siarhei Siamashka Date: Fri, 30 Mar 2018 02:36:17 +0300 Subject: [U-Boot] [PATCH 1/1] arm: armv7: enable unaligned access In-Reply-To: <20180329213350.7868-1-xypron.glpk@gmx.de> References: <20180329213350.7868-1-xypron.glpk@gmx.de> Message-ID: <20180330023617.7ff31c1c@i7> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Thu, 29 Mar 2018 23:33:50 +0200 Heinrich Schuchardt wrote: > We use the command bootefi to run UEFI executables like GRUB and iPXE. > The UEFI spec requires that unaligned access is enabled if the CPU > supports it. This is true for armv7. > > So we should not set bit 1 of the system control register, the alignment > bit. > > Without this patch iPXE snp.efi cannot be executed on the Allwinner A20. > > Signed-off-by: Heinrich Schuchardt > --- > arch/arm/cpu/armv7/start.S | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S > index 7e2695761e..1771741119 100644 > --- a/arch/arm/cpu/armv7/start.S > +++ b/arch/arm/cpu/armv7/start.S > @@ -150,7 +150,6 @@ ENTRY(cpu_init_cp15) > mrc p15, 0, r0, c1, c0, 0 > bic r0, r0, #0x00002000 @ clear bits 13 (--V-) > bic r0, r0, #0x00000007 @ clear bits 2:0 (-CAM) > - orr r0, r0, #0x00000002 @ set bit 1 (--A-) Align > orr r0, r0, #0x00000800 @ set bit 11 (Z---) BTB > #ifdef CONFIG_SYS_ICACHE_OFF > bic r0, r0, #0x00001000 @ clear bit 12 (I) I-cache Can you postpone flipping this bit until the very moment when you are about to start your UEFI executable? The main reason against setting this bit for the whole U-Boot globally is that a lot of common code in U-Boot can be run on different CPU architectures, including those which don't support unaligned memory accesses (ARMv5, MIPS, ...). This is a maintenance nightmare. Because the people, who test their patches only on ARMv7 hardware, will unintentionally keep breaking other architectures. -- Best regards, Siarhei Siamashka