From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Date: Mon, 9 Apr 2018 20:16:49 -0400 From: Marcin Ziemianowicz To: Boris Brezillon , Nicolas Ferre , Alexandre Belloni , Greg Kroah-Hartman Cc: Michael Turquette , Stephen Boyd , Alan Stern , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Subject: [PATCH v2 2/2] clk: at91: Fix for PLL set_rate changes not being actually written to PLL peripheral bits Message-ID: <20180410001649.GA62245@hak8or> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii List-ID: When a USB device is connected to the USB host port on the SAM9N12 then you get "-62" error which seems to indicate USB replies from the device are timing out. Looking around, I saw the USB bus was running at half speed. Going further, it seems that in ..._set_rate() the PLL wasn't actually being adjusted. Writing the multiplier and divider values to the peripheral fixes the bus running at half speed. Signed-off-by: Marcin Ziemianowicz --- drivers/clk/at91/clk-pll.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/clk/at91/clk-pll.c b/drivers/clk/at91/clk-pll.c index 534961766ae5..db7155fe9346 100644 --- a/drivers/clk/at91/clk-pll.c +++ b/drivers/clk/at91/clk-pll.c @@ -288,6 +288,14 @@ static int clk_pll_set_rate(struct clk_hw *hw, unsigned long rate, pll->div = div; pll->mul = mul; + // Set the PLL as per above div and mil values. + regmap_update_bits(pll->regmap, AT91_CKGR_PLLBR, + AT91_PMC_DIV | AT91_PMC_MUL, + (div << 0) | (mul << 16)); + + pr_debug("clk-pll: setting new rate, (%lu hz / %u) * %u = %lu hz\n", + parent_rate, div, mul, rate); + return 0; } -- 2.17.0 From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Subject: [v2,2/2] clk: at91: Fix for PLL set_rate changes not being actually written to PLL peripheral bits From: Marcin Message-Id: <20180410001649.GA62245@hak8or> Date: Mon, 9 Apr 2018 20:16:49 -0400 To: Boris Brezillon , Nicolas Ferre , Alexandre Belloni , Greg Kroah-Hartman Cc: Michael Turquette , Stephen Boyd , Alan Stern , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org List-ID: V2hlbiBhIFVTQiBkZXZpY2UgaXMgY29ubmVjdGVkIHRvIHRoZSBVU0IgaG9zdCBwb3J0IG9uIHRo ZSBTQU05TjEyIHRoZW4KeW91IGdldCAiLTYyIiBlcnJvciB3aGljaCBzZWVtcyB0byBpbmRpY2F0 ZSBVU0IgcmVwbGllcyBmcm9tIHRoZSBkZXZpY2UKYXJlIHRpbWluZyBvdXQuIExvb2tpbmcgYXJv dW5kLCBJIHNhdyB0aGUgVVNCIGJ1cyB3YXMgcnVubmluZyBhdCBoYWxmCnNwZWVkLiBHb2luZyBm dXJ0aGVyLCBpdCBzZWVtcyB0aGF0IGluIC4uLl9zZXRfcmF0ZSgpIHRoZSBQTEwgd2Fzbid0CmFj dHVhbGx5IGJlaW5nIGFkanVzdGVkLiBXcml0aW5nIHRoZSBtdWx0aXBsaWVyIGFuZCBkaXZpZGVy IHZhbHVlcyB0bwp0aGUgcGVyaXBoZXJhbCBmaXhlcyB0aGUgYnVzIHJ1bm5pbmcgYXQgaGFsZiBz cGVlZC4KClNpZ25lZC1vZmYtYnk6IE1hcmNpbiBaaWVtaWFub3dpY3ogPG1hcmNpbkB6aWVtaWFu b3dpY3ouY29tPgotLS0KIGRyaXZlcnMvY2xrL2F0OTEvY2xrLXBsbC5jIHwgOCArKysrKysrKwog MSBmaWxlIGNoYW5nZWQsIDggaW5zZXJ0aW9ucygrKQoKZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xr L2F0OTEvY2xrLXBsbC5jIGIvZHJpdmVycy9jbGsvYXQ5MS9jbGstcGxsLmMKaW5kZXggNTM0OTYx NzY2YWU1Li5kYjcxNTVmZTkzNDYgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL2F0OTEvY2xrLXBs bC5jCisrKyBiL2RyaXZlcnMvY2xrL2F0OTEvY2xrLXBsbC5jCkBAIC0yODgsNiArMjg4LDE0IEBA IHN0YXRpYyBpbnQgY2xrX3BsbF9zZXRfcmF0ZShzdHJ1Y3QgY2xrX2h3ICpodywgdW5zaWduZWQg bG9uZyByYXRlLAogCXBsbC0+ZGl2ID0gZGl2OwogCXBsbC0+bXVsID0gbXVsOwogCisJLy8gU2V0 IHRoZSBQTEwgYXMgcGVyIGFib3ZlIGRpdiBhbmQgbWlsIHZhbHVlcy4KKwlyZWdtYXBfdXBkYXRl X2JpdHMocGxsLT5yZWdtYXAsIEFUOTFfQ0tHUl9QTExCUiwKKwkJQVQ5MV9QTUNfRElWIHwgQVQ5 MV9QTUNfTVVMLAorCQkoZGl2IDw8IDApIHwgKG11bCA8PCAxNikpOworCisJcHJfZGVidWcoImNs ay1wbGw6IHNldHRpbmcgbmV3IHJhdGUsICglbHUgaHogLyAldSkgKiAldSA9ICVsdSBoelxuIiwK KwkJcGFyZW50X3JhdGUsIGRpdiwgbXVsLCByYXRlKTsKKwogCXJldHVybiAwOwogfQogCg== From mboxrd@z Thu Jan 1 00:00:00 1970 From: marcin@ziemianowicz.com (Marcin Ziemianowicz) Date: Mon, 9 Apr 2018 20:16:49 -0400 Subject: [PATCH v2 2/2] clk: at91: Fix for PLL set_rate changes not being actually written to PLL peripheral bits Message-ID: <20180410001649.GA62245@hak8or> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org When a USB device is connected to the USB host port on the SAM9N12 then you get "-62" error which seems to indicate USB replies from the device are timing out. Looking around, I saw the USB bus was running at half speed. Going further, it seems that in ..._set_rate() the PLL wasn't actually being adjusted. Writing the multiplier and divider values to the peripheral fixes the bus running at half speed. Signed-off-by: Marcin Ziemianowicz --- drivers/clk/at91/clk-pll.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/clk/at91/clk-pll.c b/drivers/clk/at91/clk-pll.c index 534961766ae5..db7155fe9346 100644 --- a/drivers/clk/at91/clk-pll.c +++ b/drivers/clk/at91/clk-pll.c @@ -288,6 +288,14 @@ static int clk_pll_set_rate(struct clk_hw *hw, unsigned long rate, pll->div = div; pll->mul = mul; + // Set the PLL as per above div and mil values. + regmap_update_bits(pll->regmap, AT91_CKGR_PLLBR, + AT91_PMC_DIV | AT91_PMC_MUL, + (div << 0) | (mul << 16)); + + pr_debug("clk-pll: setting new rate, (%lu hz / %u) * %u = %lu hz\n", + parent_rate, div, mul, rate); + return 0; } -- 2.17.0