From mboxrd@z Thu Jan 1 00:00:00 1970 Return-path: Received: from mx2.suse.de ([195.135.220.15]) by Galois.linutronix.de with esmtps (TLS1.0:DHE_RSA_CAMELLIA_256_CBC_SHA1:256) (Exim 4.80) (envelope-from ) id 1f8pVj-0006o9-5q for speck@linutronix.de; Wed, 18 Apr 2018 18:00:43 +0200 Received: from relay2.suse.de (charybdis-ext.suse.de [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 0474DAF06 for ; Wed, 18 Apr 2018 16:00:35 +0000 (UTC) Date: Wed, 18 Apr 2018 18:00:29 +0200 From: Borislav Petkov Subject: [MODERATED] Re: ***UNCHECKED*** Re: [patch 3/8] [PATCH v1.3.1 3/7] Linux Patch 3 Message-ID: <20180418160029.GE4290@pd.tnic> References: <20180418141551.07CBB6111A@crypto-ml.lab.linutronix.de> <20180418153712.GD4290@pd.tnic> MIME-Version: 1.0 In-Reply-To: <20180418153712.GD4290@pd.tnic> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable To: speck@linutronix.de List-ID: On Wed, Apr 18, 2018 at 05:37:13PM +0200, speck for Borislav Petkov wrote: > And add to init_amd_zn() code reading MSR 0xc0011020, setting bit 10 to > 1b and then writing it back in the mdd_at_boot() case. We have a define > for that MSR already - MSR_AMD64_LS_CFG. ... and while you're at it, do the respective thing in: init_amd_bd() and there set MSR C001_0120, bit 54. and for F16h, add case 0x16: init_amd_jg(c); break; in the switch statement in init_amd() and in that new function set MSR C001_1020, bit 33. All for the mdd_at_boot() case. Thx. --=20 Regards/Gruss, Boris. SUSE Linux GmbH, GF: Felix Imend=C3=B6rffer, Jane Smithard, Graham Norton, HR= B 21284 (AG N=C3=BCrnberg) --=20