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	for speck@linutronix.de; Wed, 25 Apr 2018 19:36:23 +0200
Date: Wed, 25 Apr 2018 10:36:19 -0700
From: Andi Kleen <ak@linux.intel.com>
Subject: [MODERATED] Re: [PATCH 1/6] Patch 1
Message-ID: <20180425173619.GJ14273@tassilo.jf.intel.com>
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To: speck@linutronix.de
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On Wed, Apr 25, 2018 at 10:25:59AM -0700, speck for Linus Torvalds wrote:
> 
> 
> On Wed, 25 Apr 2018, speck for Andi Kleen wrote:
> > 
> > We looked at it, but your invert approach is broken if there is any MMIO
> > space between MAX_PA/2 ... MAX_PA that is ever mapped to ring 3. 
> > 
> > And we cannot rule that out.
> 
> What?
> 
> That's complete garbage. MMIO space is irrelevant, since it's not even in 
> the cache. 

If the MAX_PA-1 bit is inverted the address is not pointing to MMIO space anymore,
but likely to some real cached memory.

Let's say you have MMIO at (1ULL<<45) + 10MB. You invert the bits and the PA
points to phys 10MB

BTW there are ways to make it work, but it would likely require
forbidding PROT_NONE on MMIO space. If you're ok with a potentially
existing application breaking changes like this it's possible.
But it has a risk of breaking applications.

-Andi