diff for duplicates of <20180426131418.GH11985@ulmo>

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diff --git a/a/1.2.hdr b/a/1.2.hdr
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diff --git a/a/1.1.txt b/N1/1.txt
similarity index 89%
rename from a/1.1.txt
rename to N1/1.txt
index cbcc900..4917125 100644
--- a/a/1.1.txt
+++ b/N1/1.txt
@@ -2,7 +2,7 @@ On Thu, Apr 26, 2018 at 03:59:04PM +0300, Mikko Perttunen wrote:
 > On 26.04.2018 15:41, Thierry Reding wrote:
 > > On Wed, Apr 25, 2018 at 09:28:49AM -0600, Jordan Crouse wrote:
 > > > On Wed, Apr 25, 2018 at 12:10:47PM +0200, Thierry Reding wrote:
-> > > > From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
+> > > > From: Thierry Reding <treding@nvidia.com>
 > > > > 
 > > > > Depending on the kernel configuration, early ARM architecture setup code
 > > > > may have attached the GPU to a DMA/IOMMU mapping that transparently uses
@@ -18,7 +18,7 @@ On Thu, Apr 26, 2018 at 03:59:04PM +0300, Mikko Perttunen wrote:
 > > > > these buffers through the IOMMU is unnecessary and will even lead to
 > > > > performance degradation because of the additional translation.
 > > > > 
-> > > > Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
+> > > > Signed-off-by: Thierry Reding <treding@nvidia.com>
 > > > > ---
 > > > > I had already sent this out independently to fix a regression that was
 > > > > introduced in v4.16, but then Christoph pointed out that it should've
@@ -61,3 +61,10 @@ contiguous to the GPU, so all of the per-process protection would still
 be achieved via the GPU MMU.
 
 Thierry
+-------------- next part --------------
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diff --git a/a/2.hdr b/a/2.hdr
deleted file mode 100644
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diff --git a/a/2.txt b/a/2.txt
deleted file mode 100644
index afde725..0000000
--- a/a/2.txt
+++ /dev/null
@@ -1,4 +0,0 @@
-_______________________________________________
-Nouveau mailing list
-Nouveau@lists.freedesktop.org
-https://lists.freedesktop.org/mailman/listinfo/nouveau
diff --git a/a/content_digest b/N1/content_digest
index 55a3f7f..46d2b07 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -2,27 +2,17 @@
  "ref\020180425152849.GA2447@jcrouse-lnx.qualcomm.com\0"
  "ref\020180426124103.GF11985@ulmo\0"
  "ref\0fd6e0d90-7614-296b-2927-7b2745e8fbde@nvidia.com\0"
- "ref\0fd6e0d90-7614-296b-2927-7b2745e8fbde-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org\0"
- "From\0Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0"
- "Subject\0Re: [PATCH v2 1/5] drm/nouveau: tegra: Detach from ARM DMA/IOMMU mapping\0"
+ "From\0thierry.reding@gmail.com (Thierry Reding)\0"
+ "Subject\0[PATCH v2 1/5] drm/nouveau: tegra: Detach from ARM DMA/IOMMU mapping\0"
  "Date\0Thu, 26 Apr 2018 15:14:18 +0200\0"
- "To\0Mikko Perttunen <mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0"
- "Cc\0nouveau-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org"
-  Joerg Roedel <joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>
-  Russell King <linux-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org>
-  dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
-  Christoph Hellwig <hch-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>
-  iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org
-  Daniel Vetter <daniel-/w4YWyX8dFk@public.gmane.org>
-  linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
- " linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org\0"
- "\02:1.1\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
+ "\00:1\0"
  "b\0"
  "On Thu, Apr 26, 2018 at 03:59:04PM +0300, Mikko Perttunen wrote:\n"
  "> On 26.04.2018 15:41, Thierry Reding wrote:\n"
  "> > On Wed, Apr 25, 2018 at 09:28:49AM -0600, Jordan Crouse wrote:\n"
  "> > > On Wed, Apr 25, 2018 at 12:10:47PM +0200, Thierry Reding wrote:\n"
- "> > > > From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n"
+ "> > > > From: Thierry Reding <treding@nvidia.com>\n"
  "> > > > \n"
  "> > > > Depending on the kernel configuration, early ARM architecture setup code\n"
  "> > > > may have attached the GPU to a DMA/IOMMU mapping that transparently uses\n"
@@ -38,7 +28,7 @@
  "> > > > these buffers through the IOMMU is unnecessary and will even lead to\n"
  "> > > > performance degradation because of the additional translation.\n"
  "> > > > \n"
- "> > > > Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n"
+ "> > > > Signed-off-by: Thierry Reding <treding@nvidia.com>\n"
  "> > > > ---\n"
  "> > > > I had already sent this out independently to fix a regression that was\n"
  "> > > > introduced in v4.16, but then Christoph pointed out that it should've\n"
@@ -80,31 +70,13 @@
  "contiguous to the GPU, so all of the per-process protection would still\n"
  "be achieved via the GPU MMU.\n"
  "\n"
- Thierry
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- "_______________________________________________\n"
- "Nouveau mailing list\n"
- "Nouveau@lists.freedesktop.org\n"
- https://lists.freedesktop.org/mailman/listinfo/nouveau
+ "Thierry\n"
+ "-------------- next part --------------\n"
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