From: Andrew Lunn <andrew@lunn.ch>
To: "Michal Vokáč" <vokac.m@gmail.com>
Cc: netdev@vger.kernel.org,
Vivien Didelot <vivien.didelot@savoirfairelinux.com>,
Florian Fainelli <f.fainelli@gmail.com>
Subject: Re: i.MX6S/DL and QCA8334 switch using DSA driver - CPU port not working
Date: Mon, 30 Apr 2018 15:20:25 +0200 [thread overview]
Message-ID: <20180430132025.GF10066@lunn.ch> (raw)
In-Reply-To: <48c029f1-1632-573f-c628-86b4972d668c@gmail.com>
> Using rgmii-id for the port is not valid as the qca8k driver does not support
> that mode. It only supports rgmii and sgmii. I think this is actually not
> correct. When phy-mode is set to rgmii for port the qca8k driver configures
> internal delays in the switch. So it behaves like rgmii-id I think.
>
> Should not it be:
>
> --- a/drivers/net/dsa/qca8k.c
> +++ b/drivers/net/dsa/qca8k.c
> @@ -474,7 +474,7 @@ qca8k_set_pad_ctrl(struct qca8k_priv *priv, int port, int mode)
> * PHY or MAC.
> */
> switch (mode) {
> - case PHY_INTERFACE_MODE_RGMII:
> + case PHY_INTERFACE_MODE_RGMII_ID:
> qca8k_write(priv, reg,
> QCA8K_PORT_PAD_RGMII_EN |
> QCA8K_PORT_PAD_RGMII_TX_DELAY(3) |
We have to be careful cleaning this up. It has the potential to break
existing boards when using an old device tree blob.
Andrew
next prev parent reply other threads:[~2018-04-30 13:20 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <037faf3c-8e8f-a696-8312-d1380c3b8656@gmail.com>
2018-04-26 13:37 ` i.MX6S/DL and QCA8334 switch using DSA driver - CPU port not working Michal Vokáč
2018-04-26 14:06 ` Andrew Lunn
2018-04-27 8:49 ` Michal Vokáč
2018-04-30 13:20 ` Andrew Lunn [this message]
2018-05-04 8:45 ` Michal Vokáč
2018-05-04 13:30 ` Andrew Lunn
2018-05-10 13:49 ` Michal Vokáč
2018-05-10 14:29 ` Andrew Lunn
2018-05-15 14:25 ` Michal Vokáč
2018-05-15 16:08 ` Andrew Lunn
2018-05-15 16:17 ` Florian Fainelli
2018-05-16 12:50 ` Michal Vokáč
2018-05-16 13:17 ` Andrew Lunn
2018-05-16 13:32 ` Michal Vokáč
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