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	for speck@linutronix.de; Fri, 04 May 2018 18:28:19 +0200
Date: Fri, 4 May 2018 09:28:13 -0700
From: Andi Kleen <ak@linux.intel.com>
Subject: [MODERATED] Re: [PATCH 3/5] SSB extra 1
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To: speck@linutronix.de
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On Fri, May 04, 2018 at 06:09:04PM +0200, speck for Thomas Gleixner wrote:
> On Fri, 4 May 2018, speck for Andi Kleen wrote:
> 
> > > > Ahhh, that's an interesting point.  Are you thinking that we add a BPF
> > > > "instruction" to enable or disable the mitigations, and then have the
> > > > verifier insert it as the first instruction and then before any exit
> > > > instructions?  Is there some precedent for doing this?
> > > 
> > > Dunno, but it would be the obvious thing to do I think.
> > 
> > Other option would be a preempt notifier migrating the SSB state?
> 
> Why so? Because it's more complex than just using the TIF_RDS flag which
> gets evaluated anyway?

The flag doesn't know anything about the timer. You would
need another flag that says "start a delay timer on the new CPU
too".

-Andi