From mboxrd@z Thu Jan 1 00:00:00 1970 Return-path: Received: from mx2.suse.de ([195.135.220.15]) by Galois.linutronix.de with esmtps (TLS1.0:DHE_RSA_CAMELLIA_256_CBC_SHA1:256) (Exim 4.80) (envelope-from ) id 1fIJTh-0003HL-PL for speck@linutronix.de; Mon, 14 May 2018 21:49:50 +0200 Received: from relay1.suse.de (charybdis-ext.suse.de [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 5DA83AF1B for ; Mon, 14 May 2018 19:49:40 +0000 (UTC) Date: Mon, 14 May 2018 21:49:28 +0200 From: Borislav Petkov Subject: [MODERATED] Re: [patch 09/15] Hidden 9 Message-ID: <20180514194928.GO18407@pd.tnic> References: <20180513140048.543641807@linutronix.de> <20180513140538.966088974@linutronix.de> MIME-Version: 1.0 In-Reply-To: <20180513140538.966088974@linutronix.de> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable To: speck@linutronix.de List-ID: On Sun, May 13, 2018 at 04:00:57PM +0200, speck for Thomas Gleixner wrote: > Subject: [patch 09/15] x86/speculation: Rework speculative_store_bypass_upd= ate() > From: Thomas Gleixner >=20 > The upcoming support for the virtual SPEC_CTRL MSR on AMD needs to reuse > speculative_store_bypass_update() to avoid code duplication. Add an > argument for supplying a thread info (TIF) value and create a wrapper > speculative_store_bypass_update_current() which is used at the existing > call site. >=20 > Signed-off-by: Thomas Gleixner > --- > arch/x86/include/asm/spec-ctrl.h | 7 ++++++- > arch/x86/kernel/cpu/bugs.c | 2 +- > arch/x86/kernel/process.c | 4 ++-- > 3 files changed, 9 insertions(+), 4 deletions(-) Reviewed-by: Borislav Petkov --=20 Regards/Gruss, Boris. SUSE Linux GmbH, GF: Felix Imend=C3=B6rffer, Jane Smithard, Graham Norton, HR= B 21284 (AG N=C3=BCrnberg) --=20