From mboxrd@z Thu Jan 1 00:00:00 1970 Return-path: Received: from mx2.suse.de ([195.135.220.15]) by Galois.linutronix.de with esmtps (TLS1.0:DHE_RSA_CAMELLIA_256_CBC_SHA1:256) (Exim 4.80) (envelope-from ) id 1fIbzK-0006X8-DB for speck@linutronix.de; Tue, 15 May 2018 17:35:44 +0200 Received: from relay2.suse.de (charybdis-ext.suse.de [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id D524AAC2F for ; Tue, 15 May 2018 15:35:33 +0000 (UTC) Date: Tue, 15 May 2018 17:35:18 +0200 From: Borislav Petkov Subject: [MODERATED] Re: [patch 14/15] Hidden 14 Message-ID: <20180515153518.GE11988@pd.tnic> References: <20180513140048.543641807@linutronix.de> <20180513140539.386248263@linutronix.de> MIME-Version: 1.0 In-Reply-To: <20180513140539.386248263@linutronix.de> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable To: speck@linutronix.de List-ID: On Sun, May 13, 2018 at 04:01:02PM +0200, speck for Thomas Gleixner wrote: > Subject: [patch 14/15] x86/speculation, KVM: Implement support for VIRT_SPE= C_CTRL/LS_CFG > From: Thomas Gleixner >=20 > Add the necessary logic for supporting the emulated VIRT_SPEC_CTRL MSR to > x86_virt_spec_ctrl(). If either X86_FEATURE_LS_CFG_SSBD or > X86_FEATURE_VIRT_SPEC_CTRL is set then use the new guest_virt_spec_ctrl > argument to check whether the state must be modified on the host. The > update reuses speculative_store_bypass_update() so the ZEN-specific sibling > coordination can be reused. >=20 > Signed-off-by: Thomas Gleixner > --- > arch/x86/include/asm/spec-ctrl.h | 6 ++++++ > arch/x86/kernel/cpu/bugs.c | 24 ++++++++++++++++++++++++ > 2 files changed, 30 insertions(+) >=20 > --- a/arch/x86/include/asm/spec-ctrl.h > +++ b/arch/x86/include/asm/spec-ctrl.h > @@ -56,6 +56,12 @@ static inline u64 ssbd_tif_to_spec_ctrl( > return (tifn & _TIF_SSBD) >> (TIF_SSBD - SPEC_CTRL_SSBD_SHIFT); > } > =20 > +static inline unsigned long ssbd_spec_ctrl_to_tif(u64 spec_ctrl) > +{ > + BUILD_BUG_ON(TIF_SSBD < SPEC_CTRL_SSBD_SHIFT); > + return (spec_ctrl & SPEC_CTRL_SSBD) << (TIF_SSBD - SPEC_CTRL_SSBD_SHIFT); > +} > + > static inline u64 ssbd_tif_to_amd_ls_cfg(u64 tifn) > { > return (tifn & _TIF_SSBD) ? x86_amd_ls_cfg_ssbd_mask : 0ULL; > --- a/arch/x86/kernel/cpu/bugs.c > +++ b/arch/x86/kernel/cpu/bugs.c > @@ -162,6 +162,30 @@ x86_virt_spec_ctrl(u64 guest_spec_ctrl, > wrmsrl(MSR_IA32_SPEC_CTRL, msr); > } > } > + > + /* > + * If SSBD is not handled in MSR_SPEC_CTRL on AMD update > + * MSR_AMD64_L2_CFG or MSR_VIRT_SPEC_CTRL if supported. > + */ > + if (!static_cpu_has(X86_FEATURE_LS_CFG_SSBD) && > + !static_cpu_has(X86_FEATURE_VIRT_SSBD)) > + return; > + > + /* If host has SSBD disabled via command line, force it */ Maybe /* If host has SSBD mitigation enabled, force it: */ is a bit clearer? Other than that: Reviewed-by: Borislav Petkov --=20 Regards/Gruss, Boris. SUSE Linux GmbH, GF: Felix Imend=C3=B6rffer, Jane Smithard, Graham Norton, HR= B 21284 (AG N=C3=BCrnberg) --=20