From: Daniel Mack <daniel@zonque.org>
To: linux-wireless@vger.kernel.org
Cc: wcn36xx@lists.infradead.org, kvalo@codeaurora.org,
rfried@codeaurora.org, bjorn.andersson@linaro.org,
nicolas.dechesne@linaro.org, loic.poulain@linaro.org,
Daniel Mack <daniel@zonque.org>
Subject: [PATCH 05/10] wcn36xx: only handle packets when ED or DONE bit is set
Date: Wed, 16 May 2018 16:08:15 +0200 [thread overview]
Message-ID: <20180516140820.1636-6-daniel@zonque.org> (raw)
In-Reply-To: <20180516140820.1636-1-daniel@zonque.org>
On RX and TX interrupts, check for the WCN36XX_CH_STAT_INT_ED_MASK or
WCN36XX_CH_STAT_INT_DONE_MASK in the interrupt reason register, and
only handle packets when it is set. This way, reap_tx_dxes() is only
invoked when needed.
This brings the dequeing logic in line with what the prima downstream
driver is doing.
While at it, also log the interrupt reason.
Signed-off-by: Daniel Mack <daniel@zonque.org>
---
drivers/net/wireless/ath/wcn36xx/dxe.c | 20 ++++++++++++++++----
1 file changed, 16 insertions(+), 4 deletions(-)
diff --git a/drivers/net/wireless/ath/wcn36xx/dxe.c b/drivers/net/wireless/ath/wcn36xx/dxe.c
index d11c9c536627..8c64e05ca3b7 100644
--- a/drivers/net/wireless/ath/wcn36xx/dxe.c
+++ b/drivers/net/wireless/ath/wcn36xx/dxe.c
@@ -430,8 +430,12 @@ static irqreturn_t wcn36xx_irq_tx_complete(int irq, void *dev)
WCN36XX_INT_MASK_CHAN_TX_H);
}
- wcn36xx_dbg(WCN36XX_DBG_DXE, "dxe tx ready high\n");
- reap_tx_dxes(wcn, &wcn->dxe_tx_h_ch);
+ wcn36xx_dbg(WCN36XX_DBG_DXE, "dxe tx ready high, reason %08x\n",
+ int_reason);
+
+ if (int_reason & (WCN36XX_CH_STAT_INT_DONE_MASK |
+ WCN36XX_CH_STAT_INT_ED_MASK))
+ reap_tx_dxes(wcn, &wcn->dxe_tx_h_ch);
}
if (int_src & WCN36XX_INT_MASK_CHAN_TX_L) {
@@ -465,8 +469,12 @@ static irqreturn_t wcn36xx_irq_tx_complete(int irq, void *dev)
WCN36XX_INT_MASK_CHAN_TX_L);
}
- wcn36xx_dbg(WCN36XX_DBG_DXE, "dxe tx ready low\n");
- reap_tx_dxes(wcn, &wcn->dxe_tx_l_ch);
+ wcn36xx_dbg(WCN36XX_DBG_DXE, "dxe tx ready low, reason %08x\n",
+ int_reason);
+
+ if (int_reason & (WCN36XX_CH_STAT_INT_DONE_MASK |
+ WCN36XX_CH_STAT_INT_ED_MASK))
+ reap_tx_dxes(wcn, &wcn->dxe_tx_l_ch);
}
return IRQ_HANDLED;
@@ -545,6 +553,10 @@ static int wcn36xx_rx_handle_packets(struct wcn36xx *wcn,
WCN36XX_DXE_0_INT_ED_CLR,
int_mask);
+ if (!(int_reason & (WCN36XX_CH_STAT_INT_DONE_MASK |
+ WCN36XX_CH_STAT_INT_ED_MASK)))
+ return 0;
+
spin_lock(&ch->lock);
ctl = ch->head_blk_ctl;
--
2.14.3
next prev parent reply other threads:[~2018-05-16 14:08 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-16 14:08 [PATCH 00/10] Some more patches for wcn36xx Daniel Mack
2018-05-16 14:08 ` [PATCH 01/10] wcn36xx: fix buffer commit logic on TX path Daniel Mack
2018-05-17 9:03 ` Ramon Fried
2018-05-25 10:08 ` [01/10] " Kalle Valo
2018-05-16 14:08 ` [PATCH 02/10] wcn36xx: set DMA mask explicitly Daniel Mack
2018-05-17 9:04 ` Ramon Fried
2018-05-16 14:08 ` [PATCH 03/10] wcn36xx: don't disable RX IRQ from handler Daniel Mack
2018-05-16 14:08 ` [PATCH 04/10] wcn36xx: clear all masks in RX interrupt Daniel Mack
2018-05-16 14:08 ` Daniel Mack [this message]
2018-05-16 14:08 ` [PATCH 06/10] wcn36xx: consider CTRL_EOP bit when looking for valid descriptors Daniel Mack
2018-05-16 14:08 ` [PATCH 07/10] wcn36xx: set PREASSOC and IDLE stated when BSS info changes Daniel Mack
2018-05-16 14:08 ` [PATCH 08/10] wcn36xx: drain pending indicator messages on shutdown Daniel Mack
2018-05-16 14:08 ` [PATCH 09/10] wcn36xx: simplify wcn36xx_smd_open() Daniel Mack
2018-05-16 14:08 ` [PATCH 10/10] wcn36xx: improve debug and error messages for SMD Daniel Mack
2018-05-18 10:50 ` [PATCH 00/10] Some more patches for wcn36xx Daniel Mack
2018-05-18 11:28 ` Kalle Valo
2018-05-23 10:05 ` Daniel Mack
2018-05-24 8:44 ` Kalle Valo
2018-05-24 9:40 ` Daniel Mack
2018-05-24 11:48 ` wcn36xx: bug #538: stuck tx management frames Kalle Valo
2018-05-24 12:13 ` Daniel Mack
2018-05-24 12:39 ` Kalle Valo
2018-05-24 17:53 ` Ramon Fried
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