From: Segher Boessenkool <segher@kernel.crashing.org>
To: Christophe LEROY <christophe.leroy@c-s.fr>
Cc: Michael Ellerman <mpe@ellerman.id.au>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Paul Mackerras <paulus@samba.org>,
linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/2] powerpc/32be: use stmw/lmw for registers save/restore in asm
Date: Thu, 17 May 2018 09:27:32 -0500 [thread overview]
Message-ID: <20180517142732.GU17342@gate.crashing.org> (raw)
In-Reply-To: <74ce3f30-6c06-e884-f1ea-1539edbf1a74@c-s.fr>
On Thu, May 17, 2018 at 03:27:37PM +0200, Christophe LEROY wrote:
> Le 17/05/2018 à 15:15, Segher Boessenkool a écrit :
> >>I guess we've been enabling this for all 32-bit targets for ever so it
> >>must be a reasonable option.
> >
> >On 603, load multiple (and string) are one cycle slower than doing all the
> >loads separately, and store is essentially the same as separate stores.
> >On 7xx and 7xxx both loads and stores are one cycle slower as multiple
> >than as separate insns.
>
> That's in theory when the instructions are already in the cache.
>
> But loading several instructions into the cache takes time.
Yes, of course, that's why I wrote:
> >load/store multiple are nice for saving/storing registers.
:-)
Segher
next prev parent reply other threads:[~2018-05-17 14:27 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-17 17:08 [PATCH v2 1/2] powerpc: avoid an unnecessary test and branch in longjmp() Christophe Leroy
2018-04-17 17:08 ` [PATCH v2 2/2] powerpc/32be: use stmw/lmw for registers save/restore in asm Christophe Leroy
2018-05-17 12:10 ` Michael Ellerman
2018-05-17 13:15 ` Segher Boessenkool
2018-05-17 13:27 ` Christophe LEROY
2018-05-17 14:27 ` Segher Boessenkool [this message]
2018-05-17 13:39 ` Benjamin Herrenschmidt
2018-05-21 10:01 ` [v2, 1/2] powerpc: avoid an unnecessary test and branch in longjmp() Michael Ellerman
2018-05-21 10:01 ` [v2,1/2] " Michael Ellerman
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