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diff for duplicates of <20180518110434.150a0e64@jacob-builder>

diff --git a/a/1.txt b/N1/1.txt
index 836bbd1..c96b02e 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,5 +1,5 @@
 On Fri, 11 May 2018 20:06:08 +0100
-Jean-Philippe Brucker <jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org> wrote:
+Jean-Philippe Brucker <jean-philippe.brucker@arm.com> wrote:
 
 > Some systems allow devices to handle I/O Page Faults in the core mm.
 > For example systems implementing the PCI PRI extension or Arm SMMU
@@ -24,7 +24,7 @@ Jean-Philippe Brucker <jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org> wrote
 > care about ordering between calls to iopf_queue_add_device() and
 > iommu_register_device_fault_handler().
 > 
-> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org>
+> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
 > 
 > ---
 > v1->v2: multiple queues registered by IOMMU driver
@@ -578,3 +578,8 @@ the partial list for all associated PASID/group?
 > +#endif /* CONFIG_IOMMU_PAGE_FAULT */
 > +
 >  #endif /* __LINUX_IOMMU_H */
+
+_______________________________________________
+linux-arm-kernel mailing list
+linux-arm-kernel@lists.infradead.org
+http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
diff --git a/a/content_digest b/N1/content_digest
index 5e75fe6..8bd1315 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,31 +1,47 @@
  "ref\020180511190641.23008-1-jean-philippe.brucker@arm.com\0"
  "ref\020180511190641.23008-8-jean-philippe.brucker@arm.com\0"
- "ref\020180511190641.23008-8-jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org\0"
- "From\0Jacob Pan <jacob.jun.pan-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>\0"
+ "From\0Jacob Pan <jacob.jun.pan@linux.intel.com>\0"
  "Subject\0Re: [PATCH v2 07/40] iommu: Add a page fault handler\0"
  "Date\0Fri, 18 May 2018 11:04:34 -0700\0"
- "To\0Jean-Philippe Brucker <jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org>\0"
- "Cc\0kvm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
-  linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-  xuzaibo-hv44wF8Li93QT0dZR+AlfA@public.gmane.org
-  will.deacon-5wv7dgnIgG8@public.gmane.org
-  okaya-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org
-  linux-mm-Bw31MaZKKs3YtjvyW6yDsg@public.gmane.org
-  ashok.raj-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org
-  bharatku-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org
-  linux-acpi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-  rfranz-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org
-  devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-  rgummal-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org
-  linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
-  dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org
-  ilias.apalodimas-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org
-  iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org
- " christian.koenig-5C7GfCeVMHo@public.gmane.org\0"
+ "To\0Jean-Philippe Brucker <jean-philippe.brucker@arm.com>\0"
+ "Cc\0xieyisheng1@huawei.com"
+  liubo95@huawei.com
+  kvm@vger.kernel.org
+  linux-pci@vger.kernel.org
+  xuzaibo@huawei.com
+  jonathan.cameron@huawei.com
+  will.deacon@arm.com
+  okaya@codeaurora.org
+  linux-mm@kvack.org
+  yi.l.liu@intel.com
+  ashok.raj@intel.com
+  tn@semihalf.com
+  joro@8bytes.org
+  robdclark@gmail.com
+  bharatku@xilinx.com
+  linux-acpi@vger.kernel.org
+  liudongdong3@huawei.com
+  rfranz@cavium.com
+  devicetree@vger.kernel.org
+  kevin.tian@intel.com
+  jacob.jun.pan@linux.intel.com
+  alex.williamson@redhat.com
+  rgummal@xilinx.com
+  thunder.leizhen@huawei.com
+  linux-arm-kernel@lists.infradead.org
+  shunyong.yang@hxt-semitech.com
+  dwmw2@infradead.org
+  ilias.apalodimas@linaro.org
+  jcrouse@codeaurora.org
+  iommu@lists.linux-foundation.org
+  robin.murphy@arm.com
+  christian.koenig@amd.com
+  nwatters@codeaurora.org
+ " baolu.lu@linux.intel.com\0"
  "\00:1\0"
  "b\0"
  "On Fri, 11 May 2018 20:06:08 +0100\n"
- "Jean-Philippe Brucker <jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org> wrote:\n"
+ "Jean-Philippe Brucker <jean-philippe.brucker@arm.com> wrote:\n"
  "\n"
  "> Some systems allow devices to handle I/O Page Faults in the core mm.\n"
  "> For example systems implementing the PCI PRI extension or Arm SMMU\n"
@@ -50,7 +66,7 @@
  "> care about ordering between calls to iopf_queue_add_device() and\n"
  "> iommu_register_device_fault_handler().\n"
  "> \n"
- "> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org>\n"
+ "> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>\n"
  "> \n"
  "> ---\n"
  "> v1->v2: multiple queues registered by IOMMU driver\n"
@@ -603,6 +619,11 @@
  "> +}\n"
  "> +#endif /* CONFIG_IOMMU_PAGE_FAULT */\n"
  "> +\n"
- >  #endif /* __LINUX_IOMMU_H */
+ ">  #endif /* __LINUX_IOMMU_H */\n"
+ "\n"
+ "_______________________________________________\n"
+ "linux-arm-kernel mailing list\n"
+ "linux-arm-kernel@lists.infradead.org\n"
+ http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
 
-2cf18ccc785b400cae1ac035f22d038f7e5d8b6ec29eaee7f222303a2430d7bf
+d123e0656e43e954d947981b959516b54050a06310b1e7a6f54707b9c60609d1

diff --git a/a/1.txt b/N2/1.txt
index 836bbd1..7b7be0c 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -1,5 +1,5 @@
 On Fri, 11 May 2018 20:06:08 +0100
-Jean-Philippe Brucker <jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org> wrote:
+Jean-Philippe Brucker <jean-philippe.brucker@arm.com> wrote:
 
 > Some systems allow devices to handle I/O Page Faults in the core mm.
 > For example systems implementing the PCI PRI extension or Arm SMMU
@@ -24,7 +24,7 @@ Jean-Philippe Brucker <jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org> wrote
 > care about ordering between calls to iopf_queue_add_device() and
 > iommu_register_device_fault_handler().
 > 
-> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org>
+> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
 > 
 > ---
 > v1->v2: multiple queues registered by IOMMU driver
diff --git a/a/content_digest b/N2/content_digest
index 5e75fe6..ddc182b 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -1,31 +1,13 @@
  "ref\020180511190641.23008-1-jean-philippe.brucker@arm.com\0"
  "ref\020180511190641.23008-8-jean-philippe.brucker@arm.com\0"
- "ref\020180511190641.23008-8-jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org\0"
- "From\0Jacob Pan <jacob.jun.pan-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>\0"
- "Subject\0Re: [PATCH v2 07/40] iommu: Add a page fault handler\0"
+ "From\0jacob.jun.pan@linux.intel.com (Jacob Pan)\0"
+ "Subject\0[PATCH v2 07/40] iommu: Add a page fault handler\0"
  "Date\0Fri, 18 May 2018 11:04:34 -0700\0"
- "To\0Jean-Philippe Brucker <jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org>\0"
- "Cc\0kvm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
-  linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-  xuzaibo-hv44wF8Li93QT0dZR+AlfA@public.gmane.org
-  will.deacon-5wv7dgnIgG8@public.gmane.org
-  okaya-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org
-  linux-mm-Bw31MaZKKs3YtjvyW6yDsg@public.gmane.org
-  ashok.raj-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org
-  bharatku-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org
-  linux-acpi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-  rfranz-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org
-  devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-  rgummal-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org
-  linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
-  dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org
-  ilias.apalodimas-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org
-  iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org
- " christian.koenig-5C7GfCeVMHo@public.gmane.org\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "On Fri, 11 May 2018 20:06:08 +0100\n"
- "Jean-Philippe Brucker <jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org> wrote:\n"
+ "Jean-Philippe Brucker <jean-philippe.brucker@arm.com> wrote:\n"
  "\n"
  "> Some systems allow devices to handle I/O Page Faults in the core mm.\n"
  "> For example systems implementing the PCI PRI extension or Arm SMMU\n"
@@ -50,7 +32,7 @@
  "> care about ordering between calls to iopf_queue_add_device() and\n"
  "> iommu_register_device_fault_handler().\n"
  "> \n"
- "> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org>\n"
+ "> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>\n"
  "> \n"
  "> ---\n"
  "> v1->v2: multiple queues registered by IOMMU driver\n"
@@ -605,4 +587,4 @@
  "> +\n"
  >  #endif /* __LINUX_IOMMU_H */
 
-2cf18ccc785b400cae1ac035f22d038f7e5d8b6ec29eaee7f222303a2430d7bf
+707ec3dadf452be6670a8b593411056d93d901531ef7690b1bae6f3022c3ce60

diff --git a/a/1.txt b/N3/1.txt
index 836bbd1..7b7be0c 100644
--- a/a/1.txt
+++ b/N3/1.txt
@@ -1,5 +1,5 @@
 On Fri, 11 May 2018 20:06:08 +0100
-Jean-Philippe Brucker <jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org> wrote:
+Jean-Philippe Brucker <jean-philippe.brucker@arm.com> wrote:
 
 > Some systems allow devices to handle I/O Page Faults in the core mm.
 > For example systems implementing the PCI PRI extension or Arm SMMU
@@ -24,7 +24,7 @@ Jean-Philippe Brucker <jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org> wrote
 > care about ordering between calls to iopf_queue_add_device() and
 > iommu_register_device_fault_handler().
 > 
-> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org>
+> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
 > 
 > ---
 > v1->v2: multiple queues registered by IOMMU driver
diff --git a/a/content_digest b/N3/content_digest
index 5e75fe6..0ec2d93 100644
--- a/a/content_digest
+++ b/N3/content_digest
@@ -1,31 +1,47 @@
  "ref\020180511190641.23008-1-jean-philippe.brucker@arm.com\0"
  "ref\020180511190641.23008-8-jean-philippe.brucker@arm.com\0"
- "ref\020180511190641.23008-8-jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org\0"
- "From\0Jacob Pan <jacob.jun.pan-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>\0"
+ "From\0Jacob Pan <jacob.jun.pan@linux.intel.com>\0"
  "Subject\0Re: [PATCH v2 07/40] iommu: Add a page fault handler\0"
  "Date\0Fri, 18 May 2018 11:04:34 -0700\0"
- "To\0Jean-Philippe Brucker <jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org>\0"
- "Cc\0kvm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
-  linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-  xuzaibo-hv44wF8Li93QT0dZR+AlfA@public.gmane.org
-  will.deacon-5wv7dgnIgG8@public.gmane.org
-  okaya-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org
-  linux-mm-Bw31MaZKKs3YtjvyW6yDsg@public.gmane.org
-  ashok.raj-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org
-  bharatku-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org
-  linux-acpi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-  rfranz-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org
-  devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-  rgummal-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org
-  linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
-  dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org
-  ilias.apalodimas-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org
-  iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org
- " christian.koenig-5C7GfCeVMHo@public.gmane.org\0"
+ "To\0Jean-Philippe Brucker <jean-philippe.brucker@arm.com>\0"
+ "Cc\0linux-arm-kernel@lists.infradead.org"
+  linux-pci@vger.kernel.org
+  linux-acpi@vger.kernel.org
+  devicetree@vger.kernel.org
+  iommu@lists.linux-foundation.org
+  kvm@vger.kernel.org
+  linux-mm@kvack.org
+  joro@8bytes.org
+  will.deacon@arm.com
+  robin.murphy@arm.com
+  alex.williamson@redhat.com
+  tn@semihalf.com
+  liubo95@huawei.com
+  thunder.leizhen@huawei.com
+  xieyisheng1@huawei.com
+  xuzaibo@huawei.com
+  ilias.apalodimas@linaro.org
+  jonathan.cameron@huawei.com
+  liudongdong3@huawei.com
+  shunyong.yang@hxt-semitech.com
+  nwatters@codeaurora.org
+  okaya@codeaurora.org
+  jcrouse@codeaurora.org
+  rfranz@cavium.com
+  dwmw2@infradead.org
+  yi.l.liu@intel.com
+  ashok.raj@intel.com
+  kevin.tian@intel.com
+  baolu.lu@linux.intel.com
+  robdclark@gmail.com
+  christian.koenig@amd.com
+  bharatku@xilinx.com
+  rgummal@xilinx.com
+ " jacob.jun.pan@linux.intel.com\0"
  "\00:1\0"
  "b\0"
  "On Fri, 11 May 2018 20:06:08 +0100\n"
- "Jean-Philippe Brucker <jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org> wrote:\n"
+ "Jean-Philippe Brucker <jean-philippe.brucker@arm.com> wrote:\n"
  "\n"
  "> Some systems allow devices to handle I/O Page Faults in the core mm.\n"
  "> For example systems implementing the PCI PRI extension or Arm SMMU\n"
@@ -50,7 +66,7 @@
  "> care about ordering between calls to iopf_queue_add_device() and\n"
  "> iommu_register_device_fault_handler().\n"
  "> \n"
- "> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org>\n"
+ "> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>\n"
  "> \n"
  "> ---\n"
  "> v1->v2: multiple queues registered by IOMMU driver\n"
@@ -605,4 +621,4 @@
  "> +\n"
  >  #endif /* __LINUX_IOMMU_H */
 
-2cf18ccc785b400cae1ac035f22d038f7e5d8b6ec29eaee7f222303a2430d7bf
+300eb5c6c0e6ddb475e72a49de68a74f7a30cca1c1865302cf92e0eb2a326b26

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