From: Gautham R Shenoy <ego@linux.vnet.ibm.com>
To: Michael Ellerman <mpe@ellerman.id.au>
Cc: Gautham R Shenoy <ego@linux.vnet.ibm.com>,
Michael Neuling <mikey@neuling.org>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com>,
Akshay Adiga <akshay.adiga@linux.vnet.ibm.com>,
Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com>,
Balbir Singh <bsingharora@gmail.com>,
"Oliver O'Halloran" <oohall@gmail.com>,
Nicholas Piggin <npiggin@gmail.com>,
linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/2] powerpc: Detect the presence of big-core with interleaved threads
Date: Tue, 22 May 2018 10:01:19 +0530 [thread overview]
Message-ID: <20180522043119.GA5213@in.ibm.com> (raw)
In-Reply-To: <87k1s1xg0z.fsf@concordia.ellerman.id.au>
Hello Michael,
On Fri, May 18, 2018 at 11:14:04PM +1000, Michael Ellerman wrote:
> Gautham R Shenoy <ego@linux.vnet.ibm.com> writes:
> ...
> >> > @@ -565,7 +615,16 @@ void __init smp_setup_cpu_maps(void)
> >> > vdso_data->processorCount = num_present_cpus();
> >> > #endif /* CONFIG_PPC64 */
> >> >
> >> > - /* Initialize CPU <=> thread mapping/
> >> > + dn = of_find_node_by_type(NULL, "cpu");
> >> > + if (dn) {
> >> > + if (check_for_interleaved_big_core(dn)) {
> >> > + has_interleaved_big_core = true;
> >> > + pr_info("Detected interleaved big-cores\n");
> >>
> >> Is there a runtime way to check this also? If the dmesg buffer overflows, we
> >> lose this.
> >
> > Where do you suggest we put this ? Should it be a part of
> > /proc/cpuinfo ?
>
> Hmm, it'd be nice not to pollute it with more junk.
>
> Can you just look at the pir files in sysfs?
Sure Michael. I will explore this option.
If we add a file called l1cache_thread_group, then the siblings of the
big-core that share the L1-cache can be described as follows.
# cd /sys/devices/system/cpu
# grep . cpu[0-7]/l1cache_thread_group
cpu0/l1cache_thread_group:0,2,4,6
cpu1/l1cache_thread_group:1,3,5,7
cpu2/l1cache_thread_group:0,2,4,6
cpu3/l1cache_thread_group:1,3,5,7
cpu4/l1cache_thread_group:0,2,4,6
cpu5/l1cache_thread_group:1,3,5,7
cpu6/l1cache_thread_group:0,2,4,6
cpu7/l1cache_thread_group:1,3,5,7
>
> eg. on a normal system:
>
> # cd /sys/devices/system/cpu
> # grep . cpu[0-7]/pir
> cpu0/pir:20
> cpu1/pir:21
> cpu2/pir:22
> cpu3/pir:23
> cpu4/pir:24
> cpu5/pir:25
> cpu6/pir:26
> cpu7/pir:27
>
>
> cheers
>
next prev parent reply other threads:[~2018-05-22 4:31 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-11 11:17 [PATCH 0/2] powerpc: Scheduler optimization for POWER9 bigcores Gautham R. Shenoy
2018-05-11 11:17 ` [PATCH 1/2] powerpc: Detect the presence of big-core with interleaved threads Gautham R. Shenoy
2018-05-14 3:21 ` Michael Neuling
2018-05-14 3:21 ` Michael Neuling
2018-05-16 4:35 ` Gautham R Shenoy
2018-05-18 13:14 ` Michael Ellerman
2018-05-22 4:31 ` Gautham R Shenoy [this message]
2018-05-18 13:21 ` Michael Ellerman
2018-05-22 4:34 ` Gautham R Shenoy
2018-05-11 11:17 ` [PATCH 2/2] powerpc: Enable ASYM_SMT on interleaved big-core systems Gautham R. Shenoy
2018-05-14 3:22 ` Michael Neuling
2018-05-14 3:22 ` Michael Neuling
2018-05-16 5:05 ` Gautham R Shenoy
2018-05-18 13:05 ` Michael Ellerman
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