From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Jani Nikula <jani.nikula@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/2] drm/i915: Try to suppress more spurious PCH underruns on ILK-IVB
Date: Fri, 25 May 2018 18:49:41 +0300 [thread overview]
Message-ID: <20180525154941.GE23723@intel.com> (raw)
In-Reply-To: <87d0xj3gqy.fsf@intel.com>
On Fri, May 25, 2018 at 06:19:17PM +0300, Jani Nikula wrote:
> On Fri, 25 May 2018, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> > On Thu, May 24, 2018 at 10:19:02PM +0100, Chris Wilson wrote:
> >> Quoting Ville Syrjala (2018-05-24 20:04:05)
> >> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >> >
> >> > My ILK seems to generate a spurious PCH underrun with most interlaced
> >> > HDMI modes. Add a second vblank wait to avoid it.
> >>
> >> Fwiw, a second vblank because of interlacing is very believable.
>
> /me .oO( could we wait for the 2nd vblank based on interlace? )
We certainly could. However as explained below we have seen some
similar looking underruns in CI with progressive DP as well, and so
I chose to try the shotgun approach in the hopes of hitting a few
more barn doors.
>
> >>
> >> > We have seen some spurious PCH underruns still in CI as well, some
> >> > of which seem to be progressive DP. The logs also point towards some
> >> > spurious underrins with progressive HDMI on SNB. While I don't have
> >> > a solid explanation for those let's try to kill all the birds with one
> >> > stone and always do the double wait.
> >> >
> >> > Buzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106387
> >> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >> Acked-by: Chris Wilson <chris@chris-wilson.co.uk>a
> >
> > Thanks. Pushed to dinq.
> >
> >>
> >> No point waiting for a vblank worker? ;)
> >
> > That might take a while. Also I'm not sure we'd want to use it here
> > because we'd probably want underrun reporting to be active by the
> > time we enable the planes. So we'd either have to enable planes from
> > the worker as well, or we'd just sample the vblank counter at the
> > end of crtc_enable and wait for n+2 just before we start to enable the
> > planes. Not sure if that latter approach would gain us any practical
> > parallelism though.
>
> --
> Jani Nikula, Intel Open Source Graphics Center
--
Ville Syrjälä
Intel
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next prev parent reply other threads:[~2018-05-25 15:49 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-24 19:04 [PATCH 1/2] drm/i915: Try to suppress more spurious PCH underruns on ILK-IVB Ville Syrjala
2018-05-24 19:04 ` [PATCH 2/2] drm/i915: Simplify ilk-ivb underrun suppression Ville Syrjala
2018-05-25 15:20 ` Chris Wilson
2018-05-25 15:43 ` Ville Syrjälä
2018-05-25 15:55 ` Chris Wilson
2018-05-25 19:23 ` Ville Syrjälä
2018-05-24 19:50 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Try to suppress more spurious PCH underruns on ILK-IVB Patchwork
2018-05-24 20:14 ` [PATCH 1/2] " Chris Wilson
2018-05-24 20:15 ` Chris Wilson
2018-05-24 20:31 ` Ville Syrjälä
2018-05-24 21:19 ` Chris Wilson
2018-05-25 15:02 ` Ville Syrjälä
2018-05-25 15:19 ` Jani Nikula
2018-05-25 15:49 ` Ville Syrjälä [this message]
2018-05-25 2:00 ` ✓ Fi.CI.IGT: success for series starting with [1/2] " Patchwork
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